Re: [PATCH 2/5] clk: qcom: videocc-sm8550: Add support for SM8650 videocc

[kernel test robot <lkp@intel.com>]

Hi Jagadeesh,

kernel test robot noticed the following build warnings:

[auto build test WARNING on clk/clk-next]
[also build test WARNING on robh/for-next linus/master v6.8-rc3 next-20240206]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Jagadeesh-Kona/dt-bindings-clock-qcom-Add-video-clock-bindings-for-SM8650/20240206-194148
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
patch link:    https://lore.kernel.org/r/20240206113145.31096-3-quic_jkona%40quicinc.com
patch subject: [PATCH 2/5] clk: qcom: videocc-sm8550: Add support for SM8650 videocc
config: i386-buildonly-randconfig-002-20240207 (https://download.01.org/0day-ci/archive/20240207/202402071128.aZc6BNmF-lkp@intel.com/config)
compiler: clang version 17.0.6 (https://github.com/llvm/llvm-project 6009708b4367171ccdbf4b5905cb6a803753fe18)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240207/202402071128.aZc6BNmF-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202402071128.aZc6BNmF-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/clk/qcom/videocc-sm8550.c:570:14: warning: variable 'offset' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
     570 |         } else  if (of_device_is_compatible(pdev->dev.of_node, "qcom,sm8650-videocc")) {
         |                     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/clk/qcom/videocc-sm8550.c:590:29: note: uninitialized use occurs here
     590 |         regmap_update_bits(regmap, offset, BIT(0), BIT(0));
         |                                    ^~~~~~
   drivers/clk/qcom/videocc-sm8550.c:570:10: note: remove the 'if' if its condition is always true
     570 |         } else  if (of_device_is_compatible(pdev->dev.of_node, "qcom,sm8650-videocc")) {
         |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/clk/qcom/videocc-sm8550.c:547:12: note: initialize the variable 'offset' to silence this warning
     547 |         u32 offset;
         |                   ^
         |                    = 0
   1 warning generated.


vim +570 drivers/clk/qcom/videocc-sm8550.c

   542	
   543	static int video_cc_sm8550_probe(struct platform_device *pdev)
   544	{
   545		struct regmap *regmap;
   546		int ret;
   547		u32 offset;
   548	
   549		ret = devm_pm_runtime_enable(&pdev->dev);
   550		if (ret)
   551			return ret;
   552	
   553		ret = pm_runtime_resume_and_get(&pdev->dev);
   554		if (ret)
   555			return ret;
   556	
   557		regmap = qcom_cc_map(pdev, &video_cc_sm8550_desc);
   558		if (IS_ERR(regmap)) {
   559			pm_runtime_put(&pdev->dev);
   560			return PTR_ERR(regmap);
   561		}
   562	
   563		if (of_device_is_compatible(pdev->dev.of_node, "qcom,sm8550-videocc")) {
   564			video_cc_sm8550_clocks[VIDEO_CC_MVS0_SHIFT_CLK] = NULL;
   565			video_cc_sm8550_clocks[VIDEO_CC_MVS0C_SHIFT_CLK] = NULL;
   566			video_cc_sm8550_clocks[VIDEO_CC_MVS1_SHIFT_CLK] = NULL;
   567			video_cc_sm8550_clocks[VIDEO_CC_MVS1C_SHIFT_CLK] = NULL;
   568			video_cc_sm8550_clocks[VIDEO_CC_XO_CLK_SRC] = NULL;
   569			offset = 0x8140;
 > 570		} else  if (of_device_is_compatible(pdev->dev.of_node, "qcom,sm8650-videocc")) {
   571			video_cc_pll0_config.l = 0x1e;
   572			video_cc_pll0_config.alpha = 0xa000;
   573			video_cc_pll1_config.l = 0x2b;
   574			video_cc_pll1_config.alpha = 0xc000;
   575			video_cc_mvs0_clk_src.freq_tbl = ftbl_video_cc_mvs0_clk_src_sm8650;
   576			video_cc_mvs1_clk_src.freq_tbl = ftbl_video_cc_mvs1_clk_src_sm8650;
   577			offset = 0x8150;
   578		}
   579	
   580		clk_lucid_ole_pll_configure(&video_cc_pll0, regmap, &video_cc_pll0_config);
   581		clk_lucid_ole_pll_configure(&video_cc_pll1, regmap, &video_cc_pll1_config);
   582	
   583		/*
   584		 * Keep clocks always enabled:
   585		 *	video_cc_ahb_clk
   586		 *	video_cc_sleep_clk
   587		 *	video_cc_xo_clk
   588		 */
   589		regmap_update_bits(regmap, 0x80f4, BIT(0), BIT(0));
   590		regmap_update_bits(regmap, offset, BIT(0), BIT(0));
   591		regmap_update_bits(regmap, 0x8124, BIT(0), BIT(0));
   592	
   593		ret = qcom_cc_really_probe(pdev, &video_cc_sm8550_desc, regmap);
   594	
   595		pm_runtime_put(&pdev->dev);
   596	
   597		return ret;
   598	}
   599	

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