Re: [PATCH 2/2] spi: omap2-mcspi: Add support for MULTI-mode

Mark Brown
2024-02-07T15:46:42Z

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On Wed, Feb 07, 2024 at 04:25:16PM +0100, Louis Chauvet wrote:
> Le 06/02/24 - 10:56, Mark Brown a écrit :

> this addition following the above paragraph, would it be clearer?
>
> [...] this delay).
>
> The OMAP2 MCSPI device can use two different mode to send messages:
> SINGLE and MULTI:
> In SINGLE mode, the controller only leverages one single FIFO, and the
> host system has to manually select the CS it wants to enable.
> In MULTI mode, each CS is bound to a FIFO, the host system then writes
> the data to the relevant FIFO, as the hardware will take care of the CS
>
> The drawback [...]

Yes.

> > Note that you may not have to tell the hardware the same word length as
> > the transfer specifies, so long as the wire result is the same it
> > doesn't matter.

> If I understand correclty what you want is: given a message, containing 2
> transfers of 4 bits, with cs_change disabled, use the multi mode and send
> only one 8 bits transfer instead of two 4 bits transfer?

> This seems very complex to implement, and will only benefit in very
> niche cases.

I was hoping that the hardware supports more than 8 bit words, in that
case then it gets useful for common operations like 8 bit register 8 bit
data register writes (and more for larger word sizes) which are
relatively simple. If it's just 8 bit words then yes, totally not worth
the effort.

> If I have to add this, I have to:
> - detect the very particular pattern "message of multiple transfer and
> those transfer can be packed in bigger transfer"

Or just a single transfer with two words, it's trivial cases that don't
involve rewriting anything beyond lying about the word lengths that I
was thinking of. Anything more involved should go in the core.

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