From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Tom Lendacky <thomas.lendacky@amd.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Arjan van de Ven <arjan@linux.intel.com>,
Huang Rui <ray.huang@amd.com>, Juergen Gross <jgross@suse.com>,
Dimitri Sivanich <dimitri.sivanich@hpe.com>,
Sohil Mehta <sohil.mehta@intel.com>,
K Prateek Nayak <kprateek.nayak@amd.com>,
Kan Liang <kan.liang@linux.intel.com>,
Zhang Rui <rui.zhang@intel.com>,
"Paul E. McKenney" <paulmck@kernel.org>,
Feng Tang <feng.tang@intel.com>,
Andy Shevchenko <andy@infradead.org>,
Michael Kelley <mhklinux@outlook.com>,
"Peter Zijlstra (Intel)" <peterz@infradead.org>
Subject: [patch 13/30] x86/cpu/topology: Sanitize the APIC admission logic
Date: Tue, 13 Feb 2024 22:05:52 +0100 (CET) [thread overview]
Message-ID: <20240213210252.230433953@linutronix.de> (raw)
In-Reply-To: 20240213205415.307029033@linutronix.de
From: Thomas Gleixner <tglx@linutronix.de>
Move the actually required content of generic_processor_id() into the call
sites and use common helper functions for them. This separates the early
boot registration and the ACPI hotplug mechanism completely which allows
further cleanups and improvements.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V3:
Check for disabled APIC early and exclude the boot APIC ID from
the CPUNR exhaustion check. - Sohil, Michael
Rename topo_assign_cpunr() to topo_get_cpunr() as the assignment
happens elsewhere - Arjan
---
arch/x86/kernel/cpu/topology.c | 159 +++++++++++++++++++----------------------
1 file changed, 77 insertions(+), 82 deletions(-)
---
--- a/arch/x86/kernel/cpu/topology.c
+++ b/arch/x86/kernel/cpu/topology.c
@@ -30,8 +30,10 @@ static struct {
unsigned int nr_assigned_cpus;
unsigned int nr_disabled_cpus;
unsigned int nr_rejected_cpus;
+ u32 boot_cpu_apic_id;
} topo_info __read_mostly = {
.nr_assigned_cpus = 1,
+ .boot_cpu_apic_id = BAD_APICID,
};
/*
@@ -83,78 +85,6 @@ early_initcall(smp_init_primary_thread_m
static inline void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) { }
#endif
-static int topo_lookup_cpuid(u32 apic_id)
-{
- int i;
-
- /* CPU# to APICID mapping is persistent once it is established */
- for (i = 0; i < topo_info.nr_assigned_cpus; i++) {
- if (cpuid_to_apicid[i] == apic_id)
- return i;
- }
- return -ENODEV;
-}
-
-/*
- * Should use this API to allocate logical CPU IDs to keep nr_logical_cpuids
- * and cpuid_to_apicid[] synchronized.
- */
-static int allocate_logical_cpuid(u32 apic_id)
-{
- int cpu = topo_lookup_cpuid(apic_id);
-
- if (cpu >= 0)
- return cpu;
-
- return topo_info.nr_assigned_cpus++;
-}
-
-static void cpu_update_apic(unsigned int cpu, u32 apic_id)
-{
-#if defined(CONFIG_SMP) || defined(CONFIG_X86_64)
- early_per_cpu(x86_cpu_to_apicid, cpu) = apic_id;
-#endif
- cpuid_to_apicid[cpu] = apic_id;
- set_cpu_possible(cpu, true);
- set_bit(apic_id, phys_cpu_present_map);
- set_cpu_present(cpu, true);
-
- if (system_state != SYSTEM_BOOTING)
- cpu_mark_primary_thread(cpu, apic_id);
-}
-
-static int generic_processor_info(int apicid)
-{
- int cpu;
-
- /* The boot CPU must be set before MADT/MPTABLE parsing happens */
- if (cpuid_to_apicid[0] == BAD_APICID)
- panic("Boot CPU APIC not registered yet\n");
-
- if (apicid == boot_cpu_physical_apicid)
- return 0;
-
- if (disabled_cpu_apicid == apicid) {
- int thiscpu = topo_info.nr_assigned_cpus + topo_info.nr_disabled_cpus;
-
- pr_warn("APIC: Disabling requested cpu. Processor %d/0x%x ignored.\n",
- thiscpu, apicid);
-
- topo_info.nr_rejected_cpus++;
- return -ENODEV;
- }
-
- if (topo_info.nr_assigned_cpus >= nr_cpu_ids) {
- pr_warn_once("APIC: CPU limit of %d reached. Ignoring further CPUs\n", nr_cpu_ids);
- topo_info.nr_rejected_cpus++;
- return -ENOSPC;
- }
-
- cpu = allocate_logical_cpuid(apicid);
- cpu_update_apic(cpu, apicid);
- return cpu;
-}
-
static int __initdata setup_possible_cpus = -1;
/*
@@ -222,6 +152,43 @@ static int __initdata setup_possible_cpu
set_cpu_possible(i, true);
}
+static int topo_lookup_cpuid(u32 apic_id)
+{
+ int i;
+
+ /* CPU# to APICID mapping is persistent once it is established */
+ for (i = 0; i < topo_info.nr_assigned_cpus; i++) {
+ if (cpuid_to_apicid[i] == apic_id)
+ return i;
+ }
+ return -ENODEV;
+}
+
+static int topo_get_cpunr(u32 apic_id)
+{
+ int cpu = topo_lookup_cpuid(apic_id);
+
+ if (cpu >= 0)
+ return cpu;
+
+ return topo_info.nr_assigned_cpus++;
+}
+
+static void topo_set_cpuids(unsigned int cpu, u32 apic_id, u32 acpi_id)
+{
+#if defined(CONFIG_SMP) || defined(CONFIG_X86_64)
+ early_per_cpu(x86_cpu_to_apicid, cpu) = apic_id;
+ early_per_cpu(x86_cpu_to_acpiid, cpu) = acpi_id;
+#endif
+ cpuid_to_apicid[cpu] = apic_id;
+
+ set_cpu_possible(cpu, true);
+ set_cpu_present(cpu, true);
+
+ if (system_state != SYSTEM_BOOTING)
+ cpu_mark_primary_thread(cpu, apic_id);
+}
+
/**
* topology_register_apic - Register an APIC in early topology maps
* @apic_id: The APIC ID to set up
@@ -234,17 +201,40 @@ void __init topology_register_apic(u32 a
if (apic_id >= MAX_LOCAL_APIC) {
pr_err_once("APIC ID %x exceeds kernel limit of: %x\n", apic_id, MAX_LOCAL_APIC - 1);
+ topo_info.nr_rejected_cpus++;
return;
}
- if (!present) {
- topo_info.nr_disabled_cpus++;
+ if (disabled_cpu_apicid == apic_id) {
+ pr_info("Disabling CPU as requested via 'disable_cpu_apicid=0x%x'.\n", apic_id);
+ topo_info.nr_rejected_cpus++;
return;
}
- cpu = generic_processor_info(apic_id);
- if (cpu >= 0)
- early_per_cpu(x86_cpu_to_acpiid, cpu) = acpi_id;
+ /* CPU numbers exhausted? */
+ if (apic_id != topo_info.boot_cpu_apic_id && topo_info.nr_assigned_cpus >= nr_cpu_ids) {
+ pr_warn_once("CPU limit of %d reached. Ignoring further CPUs\n", nr_cpu_ids);
+ topo_info.nr_rejected_cpus++;
+ return;
+ }
+
+ if (present) {
+ set_bit(apic_id, phys_cpu_present_map);
+
+ /*
+ * Double registration is valid in case of the boot CPU
+ * APIC because that is registered before the enumeration
+ * of the APICs via firmware parsers or VM guest
+ * mechanisms.
+ */
+ if (apic_id == topo_info.boot_cpu_apic_id)
+ cpu = 0;
+ else
+ cpu = topo_get_cpunr(apic_id);
+ topo_set_cpuids(cpu, apic_id, acpi_id);
+ } else {
+ topo_info.nr_disabled_cpus++;
+ }
}
/**
@@ -255,8 +245,10 @@ void __init topology_register_apic(u32 a
*/
void __init topology_register_boot_apic(u32 apic_id)
{
- cpuid_to_apicid[0] = apic_id;
- cpu_update_apic(0, apic_id);
+ WARN_ON_ONCE(topo_info.boot_cpu_apic_id != BAD_APICID);
+
+ topo_info.boot_cpu_apic_id = apic_id;
+ topology_register_apic(apic_id, CPU_ACPIID_INVALID, true);
}
#ifdef CONFIG_ACPI_HOTPLUG_CPU
@@ -274,10 +266,13 @@ int topology_hotplug_apic(u32 apic_id, u
cpu = topo_lookup_cpuid(apic_id);
if (cpu < 0) {
- cpu = generic_processor_info(apic_id);
- if (cpu >= 0)
- per_cpu(x86_cpu_to_acpiid, cpu) = acpi_id;
+ if (topo_info.nr_assigned_cpus >= nr_cpu_ids)
+ return -ENOSPC;
+
+ cpu = topo_assign_cpunr(apic_id);
}
+ set_bit(apic_id, phys_cpu_present_map);
+ topo_set_cpuids(cpu, apic_id, acpi_id);
return cpu;
}
next prev parent reply other threads:[~2024-02-13 21:05 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-13 21:05 [patch 00/30] x86/apic: Rework APIC registration Thomas Gleixner
2024-02-13 21:05 ` [patch 01/30] x86/cpu/topology: Move registration out of APIC code Thomas Gleixner
2024-02-16 15:17 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` [patch 02/30] x86/cpu/topology: Provide separate APIC registration functions Thomas Gleixner
2024-02-16 15:17 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` [patch 03/30] x86/acpi: Use new " Thomas Gleixner
2024-02-16 15:17 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` [patch 04/30] x86/jailhouse: Use new APIC registration function Thomas Gleixner
2024-02-16 15:17 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` [patch 05/30] x86/of: Use new APIC registration functions Thomas Gleixner
2024-02-16 15:17 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` [patch 06/30] x86/mpparse: Use new APIC registration function Thomas Gleixner
2024-02-16 15:17 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` [patch 07/30] x86/acpi: Dont invoke topology_register_apic() for XEN PV Thomas Gleixner
2024-02-16 15:17 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` [patch 08/30] x86/xen/smp_pv: Register fake APICs Thomas Gleixner
2024-02-16 15:17 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` [patch 09/30] x86/cpu/topology: Confine topology information Thomas Gleixner
2024-02-16 15:17 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` [patch 10/30] x86/cpu/topology: Simplify APIC registration Thomas Gleixner
2024-02-16 15:17 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` [patch 11/30] x86/cpu/topology: Use a data structure for topology info Thomas Gleixner
2024-02-16 15:17 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` [patch 12/30] x86/smpboot: Make error message actually useful Thomas Gleixner
2024-02-16 15:17 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` Thomas Gleixner [this message]
2024-02-16 15:16 ` [tip: x86/apic] x86/cpu/topology: Sanitize the APIC admission logic tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` [patch 14/30] x86/cpu/topology: Rework possible CPU management Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` [patch 15/30] x86/cpu: Detect real BSP on crash kernels Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` [patch 16/30] x86/topology: Add a mechanism to track topology via APIC IDs Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` [patch 17/30] x86/cpu/topology: Reject unknown APIC IDs on ACPI hotplug Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:05 ` [patch 18/30] x86/cpu/topology: Assign hotpluggable CPUIDs during init Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:06 ` [patch 19/30] x86/xen/smp_pv: Count number of vCPUs early Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:06 ` [patch 20/30] x86/cpu/topology: Let XEN/PV use topology from CPUID/MADT Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:06 ` [patch 21/30] x86/cpu/topology: Use topology bitmaps for sizing Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:06 ` [patch 22/30] x86/cpu/topology: Mop up primary thread mask handling Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:06 ` [patch 23/30] x86/cpu/topology: Simplify cpu_mark_primary_thread() Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:06 ` [patch 24/30] x86/cpu/topology: Provide logical pkg/die mapping Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:06 ` [patch 25/30] x86/cpu/topology: Use topology logical mapping mechanism Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:06 ` [patch 26/30] x86/cpu/topology: Retrieve cores per package from topology bitmaps Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:06 ` [patch 27/30] x86/cpu/topology: Rename smp_num_siblings Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:06 ` [patch 28/30] x86/cpu/topology: Rename topology_max_die_per_package() Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:06 ` [patch 29/30] x86/cpu/topology: Provide __num_[cores|threads]_per_package Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2024-02-13 21:06 ` [patch 30/30] x86/cpu/topology: Get rid of cpuinfo:: X86_max_cores Thomas Gleixner
2024-02-16 15:16 ` [tip: x86/apic] x86/cpu/topology: Get rid of cpuinfo::x86_max_cores tip-bot2 for Thomas Gleixner
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