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From: Ian Rogers <irogers@google.com>
To: Perry Taylor <perry.taylor@intel.com>,
	Samantha Alt <samantha.alt@intel.com>,
	 Caleb Biggers <caleb.biggers@intel.com>,
	Weilin Wang <weilin.wang@intel.com>,
	 Edward Baker <edward.baker@intel.com>,
	Andi Kleen <ak@linux.intel.com>,
	 Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	 Arnaldo Carvalho de Melo <acme@kernel.org>,
	Namhyung Kim <namhyung@kernel.org>,
	 Mark Rutland <mark.rutland@arm.com>,
	 Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>,  Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	 John Garry <john.g.garry@oracle.com>,
	Kan Liang <kan.liang@linux.intel.com>,
	 Jing Zhang <renyu.zj@linux.alibaba.com>,
	Thomas Richter <tmricht@linux.ibm.com>,
	 James Clark <james.clark@arm.com>,
	linux-kernel@vger.kernel.org,  linux-perf-users@vger.kernel.org,
	Stephane Eranian <eranian@google.com>
Subject: [PATCH v1 12/20] perf jevents: Add FPU metrics for Intel
Date: Wed, 28 Feb 2024 16:17:57 -0800	[thread overview]
Message-ID: <20240229001806.4158429-13-irogers@google.com> (raw)
In-Reply-To: <20240229001806.4158429-1-irogers@google.com>

Metrics break down of floating point operations.

Signed-off-by: Ian Rogers <irogers@google.com>
---
 tools/perf/pmu-events/intel_metrics.py | 90 ++++++++++++++++++++++++++
 1 file changed, 90 insertions(+)

diff --git a/tools/perf/pmu-events/intel_metrics.py b/tools/perf/pmu-events/intel_metrics.py
index 6ee708e84863..dae44d296861 100755
--- a/tools/perf/pmu-events/intel_metrics.py
+++ b/tools/perf/pmu-events/intel_metrics.py
@@ -325,6 +325,95 @@ def IntelCtxSw() -> MetricGroup:
                                     "retired & core cycles between context switches"))
 
 
+def IntelFpu() -> Optional[MetricGroup]:
+  cyc = Event("cycles")
+  try:
+    s_64 = Event("FP_ARITH_INST_RETIRED.SCALAR_SINGLE",
+                 "SIMD_INST_RETIRED.SCALAR_SINGLE")
+  except:
+    return None
+  d_64 = Event("FP_ARITH_INST_RETIRED.SCALAR_DOUBLE",
+               "SIMD_INST_RETIRED.SCALAR_DOUBLE")
+  s_128 = Event("FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE",
+                "SIMD_INST_RETIRED.PACKED_SINGLE")
+
+  flop = s_64 + d_64 + 4 * s_128
+
+  d_128 = None
+  s_256 = None
+  d_256 = None
+  s_512 = None
+  d_512 = None
+  try:
+    d_128 = Event("FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE")
+    flop += 2 * d_128
+    s_256 = Event("FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE")
+    flop += 8 * s_256
+    d_256 = Event("FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE")
+    flop += 4 * d_256
+    s_512 = Event("FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE")
+    flop += 16 * s_512
+    d_512 = Event("FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE")
+    flop += 8 * d_512
+  except:
+    pass
+
+  f_assist = Event("ASSISTS.FP", "FP_ASSIST.ANY", "FP_ASSIST.S")
+  if f_assist in [
+      "ASSISTS.FP",
+      "FP_ASSIST.S",
+  ]:
+    f_assist += "/cmask=1/"
+
+  flop_r = d_ratio(flop, interval_sec)
+  flop_c = d_ratio(flop, cyc)
+  nmi_constraint = MetricConstraint.GROUPED_EVENTS
+  if f_assist.name == "ASSISTS.FP": # Icelake+
+    nmi_constraint = MetricConstraint.NO_GROUP_EVENTS_NMI
+  def FpuMetrics(group: str, fl: Optional[Event], mult: int, desc: str) -> Optional[MetricGroup]:
+    if not fl:
+      return None
+
+    f = fl * mult
+    fl_r = d_ratio(f, interval_sec)
+    r_s = d_ratio(fl, interval_sec)
+    return MetricGroup(group, [
+        Metric(f"{group}_of_total", desc + " floating point operations per second",
+               d_ratio(f, flop), "100%"),
+        Metric(f"{group}_flops", desc + " floating point operations per second",
+               fl_r, "flops/s"),
+        Metric(f"{group}_ops", desc + " operations per second",
+               r_s, "ops/s"),
+    ])
+
+  return MetricGroup("fpu", [
+      MetricGroup("fpu_total", [
+          Metric("fpu_total_flops", "Floating point operations per second",
+                 flop_r, "flops/s"),
+          Metric("fpu_total_flopc", "Floating point operations per cycle",
+                 flop_c, "flops/cycle", constraint=nmi_constraint),
+      ]),
+      MetricGroup("fpu_64", [
+          FpuMetrics("fpu_64_single", s_64, 1, "64-bit single"),
+          FpuMetrics("fpu_64_double", d_64, 1, "64-bit double"),
+      ]),
+      MetricGroup("fpu_128", [
+          FpuMetrics("fpu_128_single", s_128, 4, "128-bit packed single"),
+          FpuMetrics("fpu_128_double", d_128, 2, "128-bit packed double"),
+      ]),
+      MetricGroup("fpu_256", [
+          FpuMetrics("fpu_256_single", s_256, 8, "128-bit packed single"),
+          FpuMetrics("fpu_256_double", d_256, 4, "128-bit packed double"),
+      ]),
+      MetricGroup("fpu_512", [
+          FpuMetrics("fpu_512_single", s_512, 16, "128-bit packed single"),
+          FpuMetrics("fpu_512_double", d_512, 8, "128-bit packed double"),
+      ]),
+      Metric("fpu_assists", "FP assists as a percentage of cycles",
+             d_ratio(f_assist, cyc), "100%"),
+  ])
+
+
 def IntelIlp() -> MetricGroup:
     tsc = Event("msr/tsc/")
     c0 = Event("msr/mperf/")
@@ -687,6 +776,7 @@ all_metrics = MetricGroup("", [
     Tsx(),
     IntelBr(),
     IntelCtxSw(),
+    IntelFpu(),
     IntelIlp(),
     IntelL2(),
     IntelLdSt(),
-- 
2.44.0.278.ge034bb2e1d-goog


  parent reply	other threads:[~2024-02-29  0:18 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-29  0:17 [PATCH v1 00/20] Python generated Intel metrics Ian Rogers
2024-02-29  0:17 ` [PATCH v1 01/20] perf jevents: Add RAPL metrics for all Intel models Ian Rogers
2024-02-29 20:59   ` Liang, Kan
2024-03-01  1:02     ` Ian Rogers
2024-02-29  0:17 ` [PATCH v1 02/20] perf jevents: Add idle metric for " Ian Rogers
2024-03-01 17:49   ` Andi Kleen
2024-03-01 18:17     ` Ian Rogers
2024-03-01 21:34       ` Andi Kleen
2024-03-01 23:09         ` Ian Rogers
2024-02-29  0:17 ` [PATCH v1 03/20] perf jevents: Add smi metric group " Ian Rogers
2024-02-29 21:09   ` Liang, Kan
2024-03-01  0:54     ` Ian Rogers
2024-02-29  0:17 ` [PATCH v1 04/20] perf jevents: Add tsx " Ian Rogers
2024-02-29 21:15   ` Liang, Kan
2024-03-01  1:01     ` Ian Rogers
2024-03-01 14:52       ` Liang, Kan
2024-03-01 16:37         ` Ian Rogers
2024-03-01 17:26           ` Liang, Kan
2024-02-29  0:17 ` [PATCH v1 05/20] perf jevents: Add br metric group for branch statistics on Intel Ian Rogers
2024-02-29 21:17   ` Liang, Kan
2024-03-01  1:02     ` Ian Rogers
2024-02-29  0:17 ` [PATCH v1 06/20] perf jevents: Add software prefetch (swpf) metric group for Intel Ian Rogers
2024-02-29  0:17 ` [PATCH v1 07/20] perf jevents: Add ports metric group giving utilization on Intel Ian Rogers
2024-02-29  0:17 ` [PATCH v1 08/20] perf jevents: Add L2 metrics for Intel Ian Rogers
2024-02-29  0:17 ` [PATCH v1 09/20] perf jevents: Add load store breakdown metrics ldst " Ian Rogers
2024-02-29  0:17 ` [PATCH v1 10/20] perf jevents: Add ILP metrics " Ian Rogers
2024-02-29  0:17 ` [PATCH v1 11/20] perf jevents: Add context switch " Ian Rogers
2024-02-29  0:17 ` Ian Rogers [this message]
2024-02-29  0:17 ` [PATCH v1 13/20] perf jevents: Add cycles breakdown metric " Ian Rogers
2024-02-29 21:30   ` Liang, Kan
2024-03-01  0:48     ` Ian Rogers
2024-03-01 13:53       ` Liang, Kan
2024-02-29  0:17 ` [PATCH v1 14/20] perf jevents: Add Miss Level Parallelism (MLP) " Ian Rogers
2024-02-29  0:18 ` [PATCH v1 15/20] perf jevents: Add mem_bw " Ian Rogers
2024-02-29  0:18 ` [PATCH v1 16/20] perf jevents: Add local/remote "mem" breakdown metrics " Ian Rogers
2024-02-29  0:18 ` [PATCH v1 17/20] perf jevents: Add dir " Ian Rogers
2024-02-29  0:18 ` [PATCH v1 18/20] perf jevents: Add C-State metrics from the PCU PMU " Ian Rogers
2024-02-29  0:18 ` [PATCH v1 19/20] perf jevents: Add local/remote miss latency metrics " Ian Rogers
2024-02-29  0:18 ` [PATCH v1 20/20] perf jevents: Add upi_bw metric " Ian Rogers

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