From: Xingyou Chen <rockrush@rockwork.org>
To: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, ajones@ventanamicro.com,
cleger@rivosinc.com, aou@eecs.berkeley.edu, palmer@dabbelt.com,
paul.walmsley@sifive.com, Xingyou Chen <rockrush@rockwork.org>
Subject: [PATCH] riscv: typo in comment for get_f64_reg
Date: Sun, 17 Mar 2024 13:55:56 +0800 [thread overview]
Message-ID: <20240317055556.9449-1-rockrush@rockwork.org> (raw)
Signed-off-by: Xingyou Chen <rockrush@rockwork.org>
---
arch/riscv/kernel/fpu.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/kernel/fpu.S b/arch/riscv/kernel/fpu.S
index 2c543f130f93..327cf527dd7e 100644
--- a/arch/riscv/kernel/fpu.S
+++ b/arch/riscv/kernel/fpu.S
@@ -211,7 +211,7 @@ SYM_FUNC_START(put_f64_reg)
SYM_FUNC_END(put_f64_reg)
/*
- * put_f64_reg - Get a 64 bits FP register value and returned it or store it to
+ * get_f64_reg - Get a 64 bits FP register value and returned it or store it to
* a pointer.
* a0 = FP register index to be retrieved
* a1 = If xlen == 32, pointer which should be loaded with the FP register value
--
2.43.0
next reply other threads:[~2024-03-17 6:01 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-17 5:55 Xingyou Chen [this message]
2024-03-17 6:07 ` [PATCH] riscv: typo in comment for get_f64_reg Randy Dunlap
2024-05-22 23:51 ` patchwork-bot+linux-riscv
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