From: Manivannan Sadhasivam <mani@kernel.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: Manivannan Sadhasivam <mani@kernel.org>,
Frank Li <Frank.Li@nxp.com>,
niklas.cassel@wdc.com, bhelgaas@google.com,
gustavo.pimentel@synopsys.com, imx@lists.linux.dev,
jdmason@kudzu.us, jingoohan1@gmail.com, kw@linux.com,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
lpieralisi@kernel.org, robh@kernel.org
Subject: Re: [PATCH v2 1/1] PCI: dwc: Fix index 0 incorrectly being interpreted as a free ATU slot
Date: Fri, 22 Mar 2024 10:56:23 +0530 [thread overview]
Message-ID: <20240322052623.GA4092@thinkpad> (raw)
In-Reply-To: <20240321180732.GA1329092@bhelgaas>
On Thu, Mar 21, 2024 at 01:07:32PM -0500, Bjorn Helgaas wrote:
> On Thu, Mar 21, 2024 at 10:43:45PM +0530, Manivannan Sadhasivam wrote:
> > On Mon, Mar 04, 2024 at 05:46:16PM -0500, Frank Li wrote:
> > > dw_pcie_ep_inbound_atu()
> > > {
> > > ...
> > > if (!ep->bar_to_atu[bar])
> > > free_win = find_first_zero_bit(ep->ib_window_map, pci->num_ib_windows);
> > > else
> > > free_win = ep->bar_to_atu[bar];
> > > ...
> > > }
> > >
> > > The atu index 0 is valid case for atu number. The find_first_zero_bit()
> > > will return 6 when second time call into this function if atu is 0. Suppose
> > > it should use branch 'free_win = ep->bar_to_atu[bar]'.
> > >
> > > Change 'bar_to_atu' to free_win + 1. Initialize bar_to_atu as 0 to indicate
> > > it have not allocate atu to the bar.
> >
> > I'd rewrite the commit message as below:
> >
> > "The mapping between PCI BAR and iATU inbound window are maintained in the
> > dw_pcie_ep::bar_to_atu[] array. While allocating a new inbound iATU map for a
> > BAR, dw_pcie_ep_inbound_atu() API will first check for the availability of the
> > existing mapping in the array and if it is not found (i.e., value in the array
> > indexed by the BAR is found to be 0), then it will allocate a new map value
> > using find_first_zero_bit().
> >
> > The issue here is, the existing logic failed to consider the fact that the map
> > value '0' is a valid value for BAR0. Because, find_first_zero_bit() will return
> > '0' as the map value for BAR0 (note that it returns the first zero bit
> > position).
> >
> > Due to this, when PERST# assert + deassert happens on the PERST# supported
> > platforms, the inbound window allocation restarts from BAR0 and the existing
> > logic to find the BAR mapping will return '6' for BAR0 instead of '0' due to the
> > fact that it considers '0' as an invalid map value.
> >
> > So fix this issue by always incrementing the map value before assigning to
> > bar_to_atu[] array and then decrementing it while fetching. This will make sure
> > that the map value '0' always represents the invalid mapping."
>
> This translates C code to English in great detail, but still doesn't
> tell me what's broken from a user's point of view, how urgent the fix
> is, or how it should be handled.
>
> DMA doesn't work because ATU setup is wrong? Driver MMIO access to
> the device doesn't work? OS crashes? How? Incorrectly routed access
> causes UR response? Happens on every boot? Only after a reboot or
> controller reset? What platforms are affected? "PERST# supported
> platforms" is not actionable without a lot of research or pre-existing
> knowledge. Should this be backported to -stable?
>
Severity is less for the bug fixed by this patch. We have 8 inbound iATU windows
on almost all of the platforms and after PERST# assert + deassert, BAR0 uses map
'6' instead of '0'.
This has no user visibility since the mapping will go fine and we have only 6
BARs. So I'd not mark this as as critical fix that needs special attention.
Frank: Please ammend the commit message with the bug impact.
- Mani
--
மணிவண்ணன் சதாசிவம்
next prev parent reply other threads:[~2024-03-22 5:26 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-04 22:46 [PATCH v2 1/1] PCI: dwc: Fix index 0 incorrectly being interpreted as a free ATU slot Frank Li
2024-03-05 9:05 ` Niklas Cassel
2024-03-13 11:09 ` Niklas Cassel
2024-03-20 8:53 ` Niklas Cassel
2024-03-20 14:29 ` Frank Li
2024-03-21 8:16 ` Niklas Cassel
2024-03-21 16:21 ` Frank Li
2024-03-21 16:41 ` Bjorn Helgaas
2024-03-21 17:13 ` Manivannan Sadhasivam
2024-03-21 18:07 ` Bjorn Helgaas
2024-03-22 5:26 ` Manivannan Sadhasivam [this message]
2024-03-22 6:19 ` Niklas Cassel
2024-03-22 19:21 ` Bjorn Helgaas
2024-04-02 5:12 ` Manivannan Sadhasivam
2024-04-02 9:23 ` Niklas Cassel
2024-04-02 16:05 ` Frank Li
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