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From: Shawn Sung <shawn.sung@mediatek.com>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
	David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Bibby Hsieh <bibby.hsieh@mediatek.com>,
	CK Hu <ck.hu@mediatek.com>,
	"Nancy . Lin" <nancy.lin@mediatek.com>,
	Fei Shao <fshao@chromium.org>, Sean Paul <sean@poorly.run>,
	Jason Chen <jason-ch.chen@mediatek.corp-partner.google.com>,
	<dri-devel@lists.freedesktop.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	Hsiao Chien Sung <shawn.sung@mediatek.com>
Subject: [PATCH v6 05/14] drm/mediatek: Set DRM mode configs accordingly
Date: Fri, 22 Mar 2024 13:28:20 +0800	[thread overview]
Message-ID: <20240322052829.9893-6-shawn.sung@mediatek.com> (raw)
In-Reply-To: <20240322052829.9893-1-shawn.sung@mediatek.com>

From: Hsiao Chien Sung <shawn.sung@mediatek.com>

Set DRM mode configs limitation according to the hardware capabilities
and pass the IGT checks as below:

- The test "graphics.IgtKms.kms_plane" requires a frame buffer with
  width of 4512 pixels (> 4096).
- The test "graphics.IgtKms.kms_cursor_crc" checks if the cursor size is
  defined, and run the test with cursor size from 1x1 to 512x512.

Please notice that the test conditions may change as IGT is updated.

Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_drm_drv.c | 22 ++++++++++++++++++++++
 drivers/gpu/drm/mediatek/mtk_drm_drv.h |  3 +++
 2 files changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index 621015b64674d..8e04e9576f7f2 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
@@ -296,6 +296,9 @@ static const struct mtk_mmsys_driver_data mt8188_vdosys0_driver_data = {
 	.conn_routes = mt8188_mtk_ddp_main_routes,
 	.num_conn_routes = ARRAY_SIZE(mt8188_mtk_ddp_main_routes),
 	.mmsys_dev_num = 2,
+	.max_width = 8191,
+	.min_width = 1,
+	.min_height = 1,
 };
 
 static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = {
@@ -310,6 +313,9 @@ static const struct mtk_mmsys_driver_data mt8195_vdosys0_driver_data = {
 	.main_path = mt8195_mtk_ddp_main,
 	.main_len = ARRAY_SIZE(mt8195_mtk_ddp_main),
 	.mmsys_dev_num = 2,
+	.max_width = 8191,
+	.min_width = 1,
+	.min_height = 1,
 };
 
 static const struct mtk_mmsys_driver_data mt8195_vdosys1_driver_data = {
@@ -317,6 +323,9 @@ static const struct mtk_mmsys_driver_data mt8195_vdosys1_driver_data = {
 	.ext_len = ARRAY_SIZE(mt8195_mtk_ddp_ext),
 	.mmsys_id = 1,
 	.mmsys_dev_num = 2,
+	.max_width = 8191,
+	.min_width = 2, /* 2-pixel align when ethdr is bypassed */
+	.min_height = 1,
 };
 
 static const struct of_device_id mtk_drm_of_ids[] = {
@@ -495,6 +504,15 @@ static int mtk_drm_kms_init(struct drm_device *drm)
 		for (j = 0; j < private->data->mmsys_dev_num; j++) {
 			priv_n = private->all_drm_private[j];
 
+			if (priv_n->data->max_width)
+				drm->mode_config.max_width  = priv_n->data->max_width;
+
+			if (priv_n->data->min_width)
+				drm->mode_config.min_width = priv_n->data->min_width;
+
+			if (priv_n->data->min_height)
+				drm->mode_config.min_height = priv_n->data->min_height;
+
 			if (i == CRTC_MAIN && priv_n->data->main_len) {
 				ret = mtk_crtc_create(drm, priv_n->data->main_path,
 						      priv_n->data->main_len, j,
@@ -522,6 +540,10 @@ static int mtk_drm_kms_init(struct drm_device *drm)
 		}
 	}
 
+	/* IGT will check if the cursor size is configured */
+	drm->mode_config.cursor_width = drm->mode_config.max_width;
+	drm->mode_config.cursor_height = drm->mode_config.max_height;
+
 	/* Use OVL device for all DMA memory allocations */
 	crtc = drm_crtc_from_index(drm, 0);
 	if (crtc)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
index 78d698ede1bf8..8917a14d7c0f2 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
@@ -46,6 +46,9 @@ struct mtk_mmsys_driver_data {
 	bool shadow_register;
 	unsigned int mmsys_id;
 	unsigned int mmsys_dev_num;
+
+	int max_width;
+	int min_width, min_height;
 };
 
 struct mtk_drm_private {
-- 
2.18.0


  parent reply	other threads:[~2024-03-22  5:28 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-22  5:28 [PATCH v6 00/14] Support IGT in display driver Shawn Sung
2024-03-22  5:28 ` [PATCH v6 01/14] soc: mediatek: Disable 9-bit alpha in ETHDR Shawn Sung
2024-03-22  5:28 ` [PATCH v6 02/14] drm/mediatek: Add OVL compatible name for MT8195 Shawn Sung
2024-03-22  5:28 ` [PATCH v6 03/14] drm/mediatek: Add missing plane settings when async update Shawn Sung
2024-03-22  5:28 ` [PATCH v6 04/14] drm/mediatek: Add DRM_MODE_ROTATE_0 to rotation property Shawn Sung
2024-03-22  9:02   ` CK Hu (胡俊光)
2024-03-25  1:52     ` CK Hu (胡俊光)
2024-03-28  2:50       ` Shawn Sung (宋孝謙)
2024-03-22  5:28 ` Shawn Sung [this message]
2024-04-25  6:54   ` [PATCH v6 05/14] drm/mediatek: Set DRM mode configs accordingly CK Hu (胡俊光)
2024-03-22  5:28 ` [PATCH v6 06/14] drm/mediatek: Turn off the layers with zero width or height Shawn Sung
2024-03-22  5:28 ` [PATCH v6 07/14] drm/mediatek: Support alpha blending in display driver Shawn Sung
2024-03-22  9:37   ` CK Hu (胡俊光)
2024-03-28  2:52     ` Shawn Sung (宋孝謙)
2024-03-22  5:28 ` [PATCH v6 08/14] drm/mediatek: Support "Pre-multiplied" alpha blending in OVL Shawn Sung
2024-03-22  6:43   ` CK Hu (胡俊光)
2024-03-22  5:28 ` [PATCH v6 09/14] drm/mediatek: Support "Pre-multiplied" alpha blending in Mixer Shawn Sung
2024-03-22  9:26   ` CK Hu (胡俊光)
2024-03-22  5:28 ` [PATCH v6 10/14] drm/mediatek: Support "None" alpha blending in OVL Shawn Sung
2024-03-22  9:32   ` CK Hu (胡俊光)
2024-03-22  5:28 ` [PATCH v6 11/14] drm/mediatek: Support "None" alpha blending in Mixer Shawn Sung
2024-03-25  2:03   ` CK Hu (胡俊光)
2024-03-28  2:56     ` Shawn Sung (宋孝謙)
2024-03-22  5:28 ` [PATCH v6 12/14] drm/mediatek: Support CRC in display driver Shawn Sung
2024-04-01  5:31   ` CK Hu (胡俊光)
2024-03-22  5:28 ` [PATCH v6 13/14] drm/mediatek: Support CRC in OVL Shawn Sung
2024-03-26  6:11   ` CK Hu (胡俊光)
2024-03-28  3:22     ` Shawn Sung (宋孝謙)
2024-03-28  5:21       ` CK Hu (胡俊光)
2024-03-22  5:28 ` [PATCH v6 14/14] drm/mediatek: Support CRC in OVL adaptor Shawn Sung

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