From: Jisheng Zhang <jszhang@kernel.org>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 4/5] clocksource/drivers/timer-clint: Use get_cycles()
Date: Tue, 26 Mar 2024 00:40:20 +0800 [thread overview]
Message-ID: <20240325164021.3229-5-jszhang@kernel.org> (raw)
In-Reply-To: <20240325164021.3229-1-jszhang@kernel.org>
Per riscv privileged spec, "The time CSR is a read-only shadow of the
memory-mapped mtime register", "On RV32I the timeh CSR is a read-only
shadow of the upper 32 bits of the memory-mapped mtime register, while
time shadows only the lower 32 bits of mtime.", so it's fine to use
time CSR to implement sched_clock and clint clockevent/clocksource.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
drivers/clocksource/timer-clint.c | 25 +------------------------
1 file changed, 1 insertion(+), 24 deletions(-)
diff --git a/drivers/clocksource/timer-clint.c b/drivers/clocksource/timer-clint.c
index 56acaa93b6c3..4537c77e623c 100644
--- a/drivers/clocksource/timer-clint.c
+++ b/drivers/clocksource/timer-clint.c
@@ -32,7 +32,6 @@
static u32 __iomem *clint_ipi_base;
static unsigned int clint_ipi_irq;
static u64 __iomem *clint_timer_cmp;
-static u64 __iomem *clint_timer_val;
static unsigned long clint_timer_freq;
static unsigned int clint_timer_irq;
@@ -60,31 +59,10 @@ static void clint_ipi_interrupt(struct irq_desc *desc)
}
#endif
-#ifdef CONFIG_64BIT
-#define clint_get_cycles() readq_relaxed(clint_timer_val)
-#else
-#define clint_get_cycles() readl_relaxed(clint_timer_val)
-#define clint_get_cycles_hi() readl_relaxed(((u32 *)clint_timer_val) + 1)
-#endif
-
-#ifdef CONFIG_64BIT
static u64 notrace clint_get_cycles64(void)
{
- return clint_get_cycles();
-}
-#else /* CONFIG_64BIT */
-static u64 notrace clint_get_cycles64(void)
-{
- u32 hi, lo;
-
- do {
- hi = clint_get_cycles_hi();
- lo = clint_get_cycles();
- } while (hi != clint_get_cycles_hi());
-
- return ((u64)hi << 32) | lo;
+ return get_cycles64();
}
-#endif /* CONFIG_64BIT */
static u64 clint_rdtime(struct clocksource *cs)
{
@@ -205,7 +183,6 @@ static int __init clint_timer_init_dt(struct device_node *np)
clint_ipi_base = base + CLINT_IPI_OFF;
clint_timer_cmp = base + CLINT_TIMER_CMP_OFF;
- clint_timer_val = base + CLINT_TIMER_VAL_OFF;
clint_timer_freq = riscv_timebase;
pr_info("%pOFP: timer running at %ld Hz\n", np, clint_timer_freq);
--
2.43.0
next prev parent reply other threads:[~2024-03-25 16:53 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-25 16:40 [PATCH 0/5] riscv: improve nommu and timer-clint Jisheng Zhang
2024-03-25 16:40 ` [PATCH 1/5] riscv: nommu: remove PAGE_OFFSET hardcoding Jisheng Zhang
2024-03-25 22:46 ` Bo Gan
2024-03-26 1:28 ` Jisheng Zhang
2024-03-26 2:32 ` Samuel Holland
2024-03-25 16:40 ` [PATCH 2/5] riscv: nommu: use CSR_TIME* for get_cycles* implementation Jisheng Zhang
2024-03-26 2:39 ` Samuel Holland
2024-03-26 16:29 ` Jisheng Zhang
2024-03-27 7:58 ` [External] " yunhui cui
2024-03-28 10:11 ` Jisheng Zhang
2024-03-25 16:40 ` [PATCH 3/5] clocksource/drivers/timer-clint: Remove clint_time_val Jisheng Zhang
2024-03-25 16:40 ` Jisheng Zhang [this message]
2024-03-25 16:40 ` [PATCH 5/5] clocksource/drivers/timer-clint: Add T-Head C9xx clint support Jisheng Zhang
2024-03-25 16:50 ` Jisheng Zhang
2024-03-25 22:22 ` Bo Gan
2024-03-26 1:25 ` Jisheng Zhang
2024-03-26 1:31 ` Jisheng Zhang
2024-03-26 16:33 ` Jisheng Zhang
2024-03-27 22:53 ` kernel test robot
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