From: Jisheng Zhang <jszhang@kernel.org>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 5/5] clocksource/drivers/timer-clint: Add T-Head C9xx clint support
Date: Tue, 26 Mar 2024 00:40:21 +0800 [thread overview]
Message-ID: <20240325164021.3229-6-jszhang@kernel.org> (raw)
In-Reply-To: <20240325164021.3229-1-jszhang@kernel.org>
The mtimecmp in T-Head C9xx clint only supports 32bit read/write,
implement such support.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
drivers/clocksource/timer-clint.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/drivers/clocksource/timer-clint.c b/drivers/clocksource/timer-clint.c
index 4537c77e623c..71188732e8a3 100644
--- a/drivers/clocksource/timer-clint.c
+++ b/drivers/clocksource/timer-clint.c
@@ -34,6 +34,7 @@ static unsigned int clint_ipi_irq;
static u64 __iomem *clint_timer_cmp;
static unsigned long clint_timer_freq;
static unsigned int clint_timer_irq;
+static bool is_c900_clint;
#ifdef CONFIG_SMP
static void clint_send_ipi(unsigned int cpu)
@@ -88,6 +89,19 @@ static int clint_clock_next_event(unsigned long delta,
return 0;
}
+static int c900_clint_clock_next_event(unsigned long delta,
+ struct clock_event_device *ce)
+{
+ void __iomem *r = clint_timer_cmp +
+ cpuid_to_hartid_map(smp_processor_id());
+ u64 val = clint_get_cycles64() + delta;
+
+ csr_set(CSR_IE, IE_TIE);
+ writel_relaxed(val, r);
+ writel_relaxed(val >> 32, r + 4);
+ return 0;
+}
+
static DEFINE_PER_CPU(struct clock_event_device, clint_clock_event) = {
.name = "clint_clockevent",
.features = CLOCK_EVT_FEAT_ONESHOT,
@@ -99,6 +113,9 @@ static int clint_timer_starting_cpu(unsigned int cpu)
{
struct clock_event_device *ce = per_cpu_ptr(&clint_clock_event, cpu);
+ if (is_c900_clint)
+ ce->set_next_event = c900_clint_clock_next_event;
+
ce->cpumask = cpumask_of(cpu);
clockevents_config_and_register(ce, clint_timer_freq, 100, ULONG_MAX);
@@ -233,5 +250,12 @@ static int __init clint_timer_init_dt(struct device_node *np)
return rc;
}
+static int __init c900_clint_timer_init_dt(struct device_node *np)
+{
+ is_c900_clint = true;
+ return clint_timer_init_dt(np);
+}
+
TIMER_OF_DECLARE(clint_timer, "riscv,clint0", clint_timer_init_dt);
TIMER_OF_DECLARE(clint_timer1, "sifive,clint0", clint_timer_init_dt);
+TIMER_OF_DECLARE(clint_timer2, "thead,c900-clint", clint_timer_init_dt);
--
2.43.0
next prev parent reply other threads:[~2024-03-25 16:53 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-25 16:40 [PATCH 0/5] riscv: improve nommu and timer-clint Jisheng Zhang
2024-03-25 16:40 ` [PATCH 1/5] riscv: nommu: remove PAGE_OFFSET hardcoding Jisheng Zhang
2024-03-25 22:46 ` Bo Gan
2024-03-26 1:28 ` Jisheng Zhang
2024-03-26 2:32 ` Samuel Holland
2024-03-25 16:40 ` [PATCH 2/5] riscv: nommu: use CSR_TIME* for get_cycles* implementation Jisheng Zhang
2024-03-26 2:39 ` Samuel Holland
2024-03-26 16:29 ` Jisheng Zhang
2024-03-27 7:58 ` [External] " yunhui cui
2024-03-28 10:11 ` Jisheng Zhang
2024-03-25 16:40 ` [PATCH 3/5] clocksource/drivers/timer-clint: Remove clint_time_val Jisheng Zhang
2024-03-25 16:40 ` [PATCH 4/5] clocksource/drivers/timer-clint: Use get_cycles() Jisheng Zhang
2024-03-25 16:40 ` Jisheng Zhang [this message]
2024-03-25 16:50 ` [PATCH 5/5] clocksource/drivers/timer-clint: Add T-Head C9xx clint support Jisheng Zhang
2024-03-25 22:22 ` Bo Gan
2024-03-26 1:25 ` Jisheng Zhang
2024-03-26 1:31 ` Jisheng Zhang
2024-03-26 16:33 ` Jisheng Zhang
2024-03-27 22:53 ` kernel test robot
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