* [PATCH v1] riscv: defconfig: Enable StarFive JH7110 drivers
@ 2024-04-03 6:09 Hal Feng
2024-04-24 10:58 ` Conor Dooley
2024-05-01 16:09 ` Palmer Dabbelt
0 siblings, 2 replies; 6+ messages in thread
From: Hal Feng @ 2024-04-03 6:09 UTC (permalink / raw)
To: Conor Dooley, Palmer Dabbelt, Paul Walmsley, Albert Ou
Cc: Hal Feng, Emil Renner Berthing, linux-riscv, linux-kernel
Add support for StarFive JH7110 SoC and VisionFive 2 board.
- Clock & reset
- Cache
- Temperature sensor
- PMIC (AXP15060)
- Restart GPIO
- RNG
- I2C
- SPI
- Quad SPI
- USB & USB 2.0 PHY & PCIe 2.0/USB 3.0 PHY
- Audio (I2S / TDM / PWM-DAC)
- Camera Subsystem & MIPI-CSI2 RX & D-PHY RX
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
---
Hi,
As more drivers of StarFive JH7110 VisionFive 2 board are upstream,
add support for them in riscv defconfig.
Best regards,
Hal
---
arch/riscv/configs/defconfig | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index fc0ec2ee13bc..a4eb66b30d95 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -111,6 +111,7 @@ CONFIG_PCIE_XILINX=y
CONFIG_PCIE_FU740=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_SIFIVE_CCACHE=y
CONFIG_MTD=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
@@ -154,24 +155,36 @@ CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
+CONFIG_HW_RANDOM_JH7110=m
+CONFIG_I2C=y
CONFIG_I2C_CHARDEV=m
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_I2C_MV64XXX=m
CONFIG_I2C_RIIC=y
CONFIG_SPI=y
+CONFIG_SPI_CADENCE_QUADSPI=m
+CONFIG_SPI_PL022=m
CONFIG_SPI_RSPI=m
CONFIG_SPI_SIFIVE=y
CONFIG_SPI_SUN6I=y
# CONFIG_PTP_1588_CLOCK is not set
CONFIG_GPIO_SIFIVE=y
+CONFIG_POWER_RESET_GPIO_RESTART=y
+CONFIG_SENSORS_SFCTEMP=y
CONFIG_CPU_THERMAL=y
CONFIG_DEVFREQ_THERMAL=y
CONFIG_RZG2L_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_SUNXI_WATCHDOG=y
CONFIG_RENESAS_RZG2LWDT=y
+CONFIG_MFD_AXP20X_I2C=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_AXP20X=y
CONFIG_REGULATOR_GPIO=y
+CONFIG_MEDIA_SUPPORT=m
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_CADENCE_CSI2RX=m
CONFIG_DRM=m
CONFIG_DRM_RADEON=m
CONFIG_DRM_NOUVEAU=m
@@ -183,6 +196,10 @@ CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_SOC_RZ=m
+CONFIG_SND_DESIGNWARE_I2S=m
+CONFIG_SND_SOC_STARFIVE=m
+CONFIG_SND_SOC_JH7110_PWMDAC=m
+CONFIG_SND_SOC_JH7110_TDM=m
CONFIG_SND_SOC_WM8978=m
CONFIG_SND_SIMPLE_CARD=m
CONFIG_USB=y
@@ -196,6 +213,11 @@ CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_RENESAS_USBHS=m
CONFIG_USB_STORAGE=y
CONFIG_USB_UAS=y
+CONFIG_USB_CDNS_SUPPORT=m
+CONFIG_USB_CDNS3=m
+CONFIG_USB_CDNS3_GADGET=y
+CONFIG_USB_CDNS3_HOST=y
+CONFIG_USB_CDNS3_STARFIVE=m
CONFIG_USB_MUSB_HDRC=m
CONFIG_USB_MUSB_SUNXI=m
CONFIG_NOP_USB_XCEIV=m
@@ -233,6 +255,13 @@ CONFIG_VIRTIO_BALLOON=y
CONFIG_VIRTIO_INPUT=y
CONFIG_VIRTIO_MMIO=y
CONFIG_RENESAS_OSTM=y
+CONFIG_STAGING=y
+CONFIG_STAGING_MEDIA=y
+CONFIG_VIDEO_STARFIVE_CAMSS=m
+CONFIG_CLK_STARFIVE_JH7110_AON=y
+CONFIG_CLK_STARFIVE_JH7110_STG=y
+CONFIG_CLK_STARFIVE_JH7110_ISP=y
+CONFIG_CLK_STARFIVE_JH7110_VOUT=y
CONFIG_SUN8I_DE2_CCU=m
CONFIG_SUN50I_IOMMU=y
CONFIG_RPMSG_CHAR=y
@@ -244,6 +273,9 @@ CONFIG_RZG2L_ADC=m
CONFIG_RESET_RZG2L_USBPHY_CTRL=y
CONFIG_PHY_SUN4I_USB=m
CONFIG_PHY_RCAR_GEN3_USB2=y
+CONFIG_PHY_STARFIVE_JH7110_DPHY_RX=m
+CONFIG_PHY_STARFIVE_JH7110_PCIE=m
+CONFIG_PHY_STARFIVE_JH7110_USB=m
CONFIG_LIBNVDIMM=y
CONFIG_NVMEM_SUNXI_SID=y
CONFIG_EXT4_FS=y
base-commit: 39cd87c4eb2b893354f3b850f916353f2658ae6f
--
2.43.2
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v1] riscv: defconfig: Enable StarFive JH7110 drivers
2024-04-03 6:09 [PATCH v1] riscv: defconfig: Enable StarFive JH7110 drivers Hal Feng
@ 2024-04-24 10:58 ` Conor Dooley
2024-05-01 16:09 ` Palmer Dabbelt
1 sibling, 0 replies; 6+ messages in thread
From: Conor Dooley @ 2024-04-24 10:58 UTC (permalink / raw)
To: Hal Feng
Cc: Conor Dooley, Palmer Dabbelt, Paul Walmsley, Albert Ou,
Emil Renner Berthing, linux-riscv, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 694 bytes --]
On Wed, Apr 03, 2024 at 02:09:02PM +0800, Hal Feng wrote:
> Add support for StarFive JH7110 SoC and VisionFive 2 board.
> - Clock & reset
> - Cache
> - Temperature sensor
> - PMIC (AXP15060)
> - Restart GPIO
> - RNG
> - I2C
> - SPI
> - Quad SPI
> - USB & USB 2.0 PHY & PCIe 2.0/USB 3.0 PHY
> - Audio (I2S / TDM / PWM-DAC)
> - Camera Subsystem & MIPI-CSI2 RX & D-PHY RX
>
> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> ---
>
> Hi,
>
> As more drivers of StarFive JH7110 VisionFive 2 board are upstream,
> add support for them in riscv defconfig.
Don't think we ever discussed sending this kind of material via the soc
tree, so this one is for you Palmer :)
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1] riscv: defconfig: Enable StarFive JH7110 drivers
2024-04-03 6:09 [PATCH v1] riscv: defconfig: Enable StarFive JH7110 drivers Hal Feng
2024-04-24 10:58 ` Conor Dooley
@ 2024-05-01 16:09 ` Palmer Dabbelt
2024-05-01 16:25 ` Emil Renner Berthing
2024-05-06 2:23 ` Hal Feng
1 sibling, 2 replies; 6+ messages in thread
From: Palmer Dabbelt @ 2024-05-01 16:09 UTC (permalink / raw)
To: hal.feng
Cc: Conor Dooley, Paul Walmsley, aou, hal.feng, emil.renner.berthing,
linux-riscv, linux-kernel
On Tue, 02 Apr 2024 23:09:02 PDT (-0700), hal.feng@starfivetech.com wrote:
> Add support for StarFive JH7110 SoC and VisionFive 2 board.
> - Clock & reset
> - Cache
> - Temperature sensor
> - PMIC (AXP15060)
> - Restart GPIO
> - RNG
> - I2C
> - SPI
> - Quad SPI
> - USB & USB 2.0 PHY & PCIe 2.0/USB 3.0 PHY
> - Audio (I2S / TDM / PWM-DAC)
> - Camera Subsystem & MIPI-CSI2 RX & D-PHY RX
>
> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> ---
>
> Hi,
>
> As more drivers of StarFive JH7110 VisionFive 2 board are upstream,
> add support for them in riscv defconfig.
>
> Best regards,
> Hal
>
> ---
> arch/riscv/configs/defconfig | 32 ++++++++++++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index fc0ec2ee13bc..a4eb66b30d95 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -111,6 +111,7 @@ CONFIG_PCIE_XILINX=y
> CONFIG_PCIE_FU740=y
> CONFIG_DEVTMPFS=y
> CONFIG_DEVTMPFS_MOUNT=y
> +CONFIG_SIFIVE_CCACHE=y
> CONFIG_MTD=y
> CONFIG_MTD_BLOCK=y
> CONFIG_MTD_CFI=y
> @@ -154,24 +155,36 @@ CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
> CONFIG_VIRTIO_CONSOLE=y
> CONFIG_HW_RANDOM=y
> CONFIG_HW_RANDOM_VIRTIO=y
> +CONFIG_HW_RANDOM_JH7110=m
> +CONFIG_I2C=y
> CONFIG_I2C_CHARDEV=m
> +CONFIG_I2C_DESIGNWARE_PLATFORM=y
> CONFIG_I2C_MV64XXX=m
> CONFIG_I2C_RIIC=y
> CONFIG_SPI=y
> +CONFIG_SPI_CADENCE_QUADSPI=m
> +CONFIG_SPI_PL022=m
> CONFIG_SPI_RSPI=m
> CONFIG_SPI_SIFIVE=y
> CONFIG_SPI_SUN6I=y
> # CONFIG_PTP_1588_CLOCK is not set
> CONFIG_GPIO_SIFIVE=y
> +CONFIG_POWER_RESET_GPIO_RESTART=y
> +CONFIG_SENSORS_SFCTEMP=y
> CONFIG_CPU_THERMAL=y
> CONFIG_DEVFREQ_THERMAL=y
> CONFIG_RZG2L_THERMAL=y
> CONFIG_WATCHDOG=y
> CONFIG_SUNXI_WATCHDOG=y
> CONFIG_RENESAS_RZG2LWDT=y
> +CONFIG_MFD_AXP20X_I2C=y
> CONFIG_REGULATOR=y
> CONFIG_REGULATOR_FIXED_VOLTAGE=y
> +CONFIG_REGULATOR_AXP20X=y
> CONFIG_REGULATOR_GPIO=y
> +CONFIG_MEDIA_SUPPORT=m
> +CONFIG_V4L_PLATFORM_DRIVERS=y
> +CONFIG_VIDEO_CADENCE_CSI2RX=m
> CONFIG_DRM=m
> CONFIG_DRM_RADEON=m
> CONFIG_DRM_NOUVEAU=m
> @@ -183,6 +196,10 @@ CONFIG_SOUND=y
> CONFIG_SND=y
> CONFIG_SND_SOC=y
> CONFIG_SND_SOC_RZ=m
> +CONFIG_SND_DESIGNWARE_I2S=m
> +CONFIG_SND_SOC_STARFIVE=m
> +CONFIG_SND_SOC_JH7110_PWMDAC=m
> +CONFIG_SND_SOC_JH7110_TDM=m
> CONFIG_SND_SOC_WM8978=m
> CONFIG_SND_SIMPLE_CARD=m
> CONFIG_USB=y
> @@ -196,6 +213,11 @@ CONFIG_USB_OHCI_HCD_PLATFORM=y
> CONFIG_USB_RENESAS_USBHS=m
> CONFIG_USB_STORAGE=y
> CONFIG_USB_UAS=y
> +CONFIG_USB_CDNS_SUPPORT=m
> +CONFIG_USB_CDNS3=m
> +CONFIG_USB_CDNS3_GADGET=y
> +CONFIG_USB_CDNS3_HOST=y
> +CONFIG_USB_CDNS3_STARFIVE=m
> CONFIG_USB_MUSB_HDRC=m
> CONFIG_USB_MUSB_SUNXI=m
> CONFIG_NOP_USB_XCEIV=m
> @@ -233,6 +255,13 @@ CONFIG_VIRTIO_BALLOON=y
> CONFIG_VIRTIO_INPUT=y
> CONFIG_VIRTIO_MMIO=y
> CONFIG_RENESAS_OSTM=y
> +CONFIG_STAGING=y
> +CONFIG_STAGING_MEDIA=y
g
I don't think we want staging on in defconfig.
> +CONFIG_VIDEO_STARFIVE_CAMSS=m
Is it just for this? I think we can just exclude that from defconfig
until it gets out of staging, we should be able to boot without it.
According to the TODO userspace isn't there yet, so I think it should be
pretty safe.
> +CONFIG_CLK_STARFIVE_JH7110_AON=y
> +CONFIG_CLK_STARFIVE_JH7110_STG=y
> +CONFIG_CLK_STARFIVE_JH7110_ISP=y
> +CONFIG_CLK_STARFIVE_JH7110_VOUT=y
> CONFIG_SUN8I_DE2_CCU=m
> CONFIG_SUN50I_IOMMU=y
> CONFIG_RPMSG_CHAR=y
> @@ -244,6 +273,9 @@ CONFIG_RZG2L_ADC=m
> CONFIG_RESET_RZG2L_USBPHY_CTRL=y
> CONFIG_PHY_SUN4I_USB=m
> CONFIG_PHY_RCAR_GEN3_USB2=y
> +CONFIG_PHY_STARFIVE_JH7110_DPHY_RX=m
> +CONFIG_PHY_STARFIVE_JH7110_PCIE=m
> +CONFIG_PHY_STARFIVE_JH7110_USB=m
> CONFIG_LIBNVDIMM=y
> CONFIG_NVMEM_SUNXI_SID=y
> CONFIG_EXT4_FS=y
>
> base-commit: 39cd87c4eb2b893354f3b850f916353f2658ae6f
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1] riscv: defconfig: Enable StarFive JH7110 drivers
2024-05-01 16:09 ` Palmer Dabbelt
@ 2024-05-01 16:25 ` Emil Renner Berthing
2024-05-06 2:31 ` Hal Feng
2024-05-06 2:23 ` Hal Feng
1 sibling, 1 reply; 6+ messages in thread
From: Emil Renner Berthing @ 2024-05-01 16:25 UTC (permalink / raw)
To: Palmer Dabbelt, hal.feng
Cc: Conor Dooley, Paul Walmsley, aou, emil.renner.berthing,
linux-riscv, linux-kernel
Palmer Dabbelt wrote:
> On Tue, 02 Apr 2024 23:09:02 PDT (-0700), hal.feng@starfivetech.com wrote:
> > Add support for StarFive JH7110 SoC and VisionFive 2 board.
> > - Clock & reset
> > - Cache
> > - Temperature sensor
> > - PMIC (AXP15060)
> > - Restart GPIO
> > - RNG
> > - I2C
> > - SPI
> > - Quad SPI
> > - USB & USB 2.0 PHY & PCIe 2.0/USB 3.0 PHY
> > - Audio (I2S / TDM / PWM-DAC)
> > - Camera Subsystem & MIPI-CSI2 RX & D-PHY RX
> >
> > Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> > ---
> >
> > Hi,
> >
> > As more drivers of StarFive JH7110 VisionFive 2 board are upstream,
> > add support for them in riscv defconfig.
> >
> > Best regards,
> > Hal
> >
> > ---
> > arch/riscv/configs/defconfig | 32 ++++++++++++++++++++++++++++++++
> > 1 file changed, 32 insertions(+)
> >
> > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> > index fc0ec2ee13bc..a4eb66b30d95 100644
> > --- a/arch/riscv/configs/defconfig
> > +++ b/arch/riscv/configs/defconfig
> > @@ -111,6 +111,7 @@ CONFIG_PCIE_XILINX=y
> > CONFIG_PCIE_FU740=y
> > CONFIG_DEVTMPFS=y
> > CONFIG_DEVTMPFS_MOUNT=y
> > +CONFIG_SIFIVE_CCACHE=y
> > CONFIG_MTD=y
> > CONFIG_MTD_BLOCK=y
> > CONFIG_MTD_CFI=y
> > @@ -154,24 +155,36 @@ CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
> > CONFIG_VIRTIO_CONSOLE=y
> > CONFIG_HW_RANDOM=y
> > CONFIG_HW_RANDOM_VIRTIO=y
> > +CONFIG_HW_RANDOM_JH7110=m
> > +CONFIG_I2C=y
> > CONFIG_I2C_CHARDEV=m
> > +CONFIG_I2C_DESIGNWARE_PLATFORM=y
> > CONFIG_I2C_MV64XXX=m
> > CONFIG_I2C_RIIC=y
> > CONFIG_SPI=y
> > +CONFIG_SPI_CADENCE_QUADSPI=m
> > +CONFIG_SPI_PL022=m
> > CONFIG_SPI_RSPI=m
> > CONFIG_SPI_SIFIVE=y
> > CONFIG_SPI_SUN6I=y
> > # CONFIG_PTP_1588_CLOCK is not set
> > CONFIG_GPIO_SIFIVE=y
> > +CONFIG_POWER_RESET_GPIO_RESTART=y
> > +CONFIG_SENSORS_SFCTEMP=y
If this needs an update anyway this temperature sensor shouldn't be critical to
boot and can be left as a module.
/Emil
> > CONFIG_CPU_THERMAL=y
> > CONFIG_DEVFREQ_THERMAL=y
> > CONFIG_RZG2L_THERMAL=y
> > CONFIG_WATCHDOG=y
> > CONFIG_SUNXI_WATCHDOG=y
> > CONFIG_RENESAS_RZG2LWDT=y
> > +CONFIG_MFD_AXP20X_I2C=y
> > CONFIG_REGULATOR=y
> > CONFIG_REGULATOR_FIXED_VOLTAGE=y
> > +CONFIG_REGULATOR_AXP20X=y
> > CONFIG_REGULATOR_GPIO=y
> > +CONFIG_MEDIA_SUPPORT=m
> > +CONFIG_V4L_PLATFORM_DRIVERS=y
> > +CONFIG_VIDEO_CADENCE_CSI2RX=m
> > CONFIG_DRM=m
> > CONFIG_DRM_RADEON=m
> > CONFIG_DRM_NOUVEAU=m
> > @@ -183,6 +196,10 @@ CONFIG_SOUND=y
> > CONFIG_SND=y
> > CONFIG_SND_SOC=y
> > CONFIG_SND_SOC_RZ=m
> > +CONFIG_SND_DESIGNWARE_I2S=m
> > +CONFIG_SND_SOC_STARFIVE=m
> > +CONFIG_SND_SOC_JH7110_PWMDAC=m
> > +CONFIG_SND_SOC_JH7110_TDM=m
> > CONFIG_SND_SOC_WM8978=m
> > CONFIG_SND_SIMPLE_CARD=m
> > CONFIG_USB=y
> > @@ -196,6 +213,11 @@ CONFIG_USB_OHCI_HCD_PLATFORM=y
> > CONFIG_USB_RENESAS_USBHS=m
> > CONFIG_USB_STORAGE=y
> > CONFIG_USB_UAS=y
> > +CONFIG_USB_CDNS_SUPPORT=m
> > +CONFIG_USB_CDNS3=m
> > +CONFIG_USB_CDNS3_GADGET=y
> > +CONFIG_USB_CDNS3_HOST=y
> > +CONFIG_USB_CDNS3_STARFIVE=m
> > CONFIG_USB_MUSB_HDRC=m
> > CONFIG_USB_MUSB_SUNXI=m
> > CONFIG_NOP_USB_XCEIV=m
> > @@ -233,6 +255,13 @@ CONFIG_VIRTIO_BALLOON=y
> > CONFIG_VIRTIO_INPUT=y
> > CONFIG_VIRTIO_MMIO=y
> > CONFIG_RENESAS_OSTM=y
> > +CONFIG_STAGING=y
> > +CONFIG_STAGING_MEDIA=y
> g
> I don't think we want staging on in defconfig.
>
> > +CONFIG_VIDEO_STARFIVE_CAMSS=m
>
> Is it just for this? I think we can just exclude that from defconfig
> until it gets out of staging, we should be able to boot without it.
> According to the TODO userspace isn't there yet, so I think it should be
> pretty safe.
>
> > +CONFIG_CLK_STARFIVE_JH7110_AON=y
> > +CONFIG_CLK_STARFIVE_JH7110_STG=y
> > +CONFIG_CLK_STARFIVE_JH7110_ISP=y
> > +CONFIG_CLK_STARFIVE_JH7110_VOUT=y
> > CONFIG_SUN8I_DE2_CCU=m
> > CONFIG_SUN50I_IOMMU=y
> > CONFIG_RPMSG_CHAR=y
> > @@ -244,6 +273,9 @@ CONFIG_RZG2L_ADC=m
> > CONFIG_RESET_RZG2L_USBPHY_CTRL=y
> > CONFIG_PHY_SUN4I_USB=m
> > CONFIG_PHY_RCAR_GEN3_USB2=y
> > +CONFIG_PHY_STARFIVE_JH7110_DPHY_RX=m
> > +CONFIG_PHY_STARFIVE_JH7110_PCIE=m
> > +CONFIG_PHY_STARFIVE_JH7110_USB=m
> > CONFIG_LIBNVDIMM=y
> > CONFIG_NVMEM_SUNXI_SID=y
> > CONFIG_EXT4_FS=y
> >
> > base-commit: 39cd87c4eb2b893354f3b850f916353f2658ae6f
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH v1] riscv: defconfig: Enable StarFive JH7110 drivers
2024-05-01 16:09 ` Palmer Dabbelt
2024-05-01 16:25 ` Emil Renner Berthing
@ 2024-05-06 2:23 ` Hal Feng
1 sibling, 0 replies; 6+ messages in thread
From: Hal Feng @ 2024-05-06 2:23 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: Conor Dooley, Paul Walmsley, aou@eecs.berkeley.edu,
emil.renner.berthing@canonical.com,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
> On 02.05.24 00:09, Palmer Dabbelt wrote:
> On Tue, 02 Apr 2024 23:09:02 PDT (-0700), hal.feng@starfivetech.com wrote:
> > Add support for StarFive JH7110 SoC and VisionFive 2 board.
> > - Clock & reset
> > - Cache
> > - Temperature sensor
> > - PMIC (AXP15060)
> > - Restart GPIO
> > - RNG
> > - I2C
> > - SPI
> > - Quad SPI
> > - USB & USB 2.0 PHY & PCIe 2.0/USB 3.0 PHY
> > - Audio (I2S / TDM / PWM-DAC)
> > - Camera Subsystem & MIPI-CSI2 RX & D-PHY RX
> >
> > Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> > ---
> >
> > Hi,
> >
> > As more drivers of StarFive JH7110 VisionFive 2 board are upstream,
> > add support for them in riscv defconfig.
> >
> > Best regards,
> > Hal
> >
> > ---
> > arch/riscv/configs/defconfig | 32 ++++++++++++++++++++++++++++++++
> > 1 file changed, 32 insertions(+)
> >
> > diff --git a/arch/riscv/configs/defconfig
> > b/arch/riscv/configs/defconfig index fc0ec2ee13bc..a4eb66b30d95 100644
> > --- a/arch/riscv/configs/defconfig
> > +++ b/arch/riscv/configs/defconfig
> > @@ -111,6 +111,7 @@ CONFIG_PCIE_XILINX=y CONFIG_PCIE_FU740=y
> > CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y
> > +CONFIG_SIFIVE_CCACHE=y
> > CONFIG_MTD=y
> > CONFIG_MTD_BLOCK=y
> > CONFIG_MTD_CFI=y
> > @@ -154,24 +155,36 @@ CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
> > CONFIG_VIRTIO_CONSOLE=y
> > CONFIG_HW_RANDOM=y
> > CONFIG_HW_RANDOM_VIRTIO=y
> > +CONFIG_HW_RANDOM_JH7110=m
> > +CONFIG_I2C=y
> > CONFIG_I2C_CHARDEV=m
> > +CONFIG_I2C_DESIGNWARE_PLATFORM=y
> > CONFIG_I2C_MV64XXX=m
> > CONFIG_I2C_RIIC=y
> > CONFIG_SPI=y
> > +CONFIG_SPI_CADENCE_QUADSPI=m
> > +CONFIG_SPI_PL022=m
> > CONFIG_SPI_RSPI=m
> > CONFIG_SPI_SIFIVE=y
> > CONFIG_SPI_SUN6I=y
> > # CONFIG_PTP_1588_CLOCK is not set
> > CONFIG_GPIO_SIFIVE=y
> > +CONFIG_POWER_RESET_GPIO_RESTART=y
> > +CONFIG_SENSORS_SFCTEMP=y
> > CONFIG_CPU_THERMAL=y
> > CONFIG_DEVFREQ_THERMAL=y
> > CONFIG_RZG2L_THERMAL=y
> > CONFIG_WATCHDOG=y
> > CONFIG_SUNXI_WATCHDOG=y
> > CONFIG_RENESAS_RZG2LWDT=y
> > +CONFIG_MFD_AXP20X_I2C=y
> > CONFIG_REGULATOR=y
> > CONFIG_REGULATOR_FIXED_VOLTAGE=y
> > +CONFIG_REGULATOR_AXP20X=y
> > CONFIG_REGULATOR_GPIO=y
> > +CONFIG_MEDIA_SUPPORT=m
> > +CONFIG_V4L_PLATFORM_DRIVERS=y
> > +CONFIG_VIDEO_CADENCE_CSI2RX=m
> > CONFIG_DRM=m
> > CONFIG_DRM_RADEON=m
> > CONFIG_DRM_NOUVEAU=m
> > @@ -183,6 +196,10 @@ CONFIG_SOUND=y
> > CONFIG_SND=y
> > CONFIG_SND_SOC=y
> > CONFIG_SND_SOC_RZ=m
> > +CONFIG_SND_DESIGNWARE_I2S=m
> > +CONFIG_SND_SOC_STARFIVE=m
> > +CONFIG_SND_SOC_JH7110_PWMDAC=m
> > +CONFIG_SND_SOC_JH7110_TDM=m
> > CONFIG_SND_SOC_WM8978=m
> > CONFIG_SND_SIMPLE_CARD=m
> > CONFIG_USB=y
> > @@ -196,6 +213,11 @@ CONFIG_USB_OHCI_HCD_PLATFORM=y
> > CONFIG_USB_RENESAS_USBHS=m CONFIG_USB_STORAGE=y
> CONFIG_USB_UAS=y
> > +CONFIG_USB_CDNS_SUPPORT=m
> > +CONFIG_USB_CDNS3=m
> > +CONFIG_USB_CDNS3_GADGET=y
> > +CONFIG_USB_CDNS3_HOST=y
> > +CONFIG_USB_CDNS3_STARFIVE=m
> > CONFIG_USB_MUSB_HDRC=m
> > CONFIG_USB_MUSB_SUNXI=m
> > CONFIG_NOP_USB_XCEIV=m
> > @@ -233,6 +255,13 @@ CONFIG_VIRTIO_BALLOON=y
> CONFIG_VIRTIO_INPUT=y
> > CONFIG_VIRTIO_MMIO=y CONFIG_RENESAS_OSTM=y
> > +CONFIG_STAGING=y
> > +CONFIG_STAGING_MEDIA=y
> g
> I don't think we want staging on in defconfig.
>
> > +CONFIG_VIDEO_STARFIVE_CAMSS=m
>
> Is it just for this? I think we can just exclude that from defconfig until it gets out
> of staging, we should be able to boot without it.
> According to the TODO userspace isn't there yet, so I think it should be pretty
> safe.
Yeah, CONFIG_STAGING is just for CONFIG_VIDEO_STARFIVE_CAMSS.
I will drop the above three configs in the next version.
Best regards,
Hal
>
> > +CONFIG_CLK_STARFIVE_JH7110_AON=y
> > +CONFIG_CLK_STARFIVE_JH7110_STG=y
> > +CONFIG_CLK_STARFIVE_JH7110_ISP=y
> > +CONFIG_CLK_STARFIVE_JH7110_VOUT=y
> > CONFIG_SUN8I_DE2_CCU=m
> > CONFIG_SUN50I_IOMMU=y
> > CONFIG_RPMSG_CHAR=y
> > @@ -244,6 +273,9 @@ CONFIG_RZG2L_ADC=m
> > CONFIG_RESET_RZG2L_USBPHY_CTRL=y CONFIG_PHY_SUN4I_USB=m
> > CONFIG_PHY_RCAR_GEN3_USB2=y
> > +CONFIG_PHY_STARFIVE_JH7110_DPHY_RX=m
> > +CONFIG_PHY_STARFIVE_JH7110_PCIE=m
> > +CONFIG_PHY_STARFIVE_JH7110_USB=m
> > CONFIG_LIBNVDIMM=y
> > CONFIG_NVMEM_SUNXI_SID=y
> > CONFIG_EXT4_FS=y
> >
> > base-commit: 39cd87c4eb2b893354f3b850f916353f2658ae6f
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH v1] riscv: defconfig: Enable StarFive JH7110 drivers
2024-05-01 16:25 ` Emil Renner Berthing
@ 2024-05-06 2:31 ` Hal Feng
0 siblings, 0 replies; 6+ messages in thread
From: Hal Feng @ 2024-05-06 2:31 UTC (permalink / raw)
To: Emil Renner Berthing, Palmer Dabbelt
Cc: Conor Dooley, Paul Walmsley, aou@eecs.berkeley.edu,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
> On 02.05.24 00:26, Emil Renner Berthing wrote:
> Palmer Dabbelt wrote:
> > On Tue, 02 Apr 2024 23:09:02 PDT (-0700), hal.feng@starfivetech.com wrote:
> > > Add support for StarFive JH7110 SoC and VisionFive 2 board.
> > > - Clock & reset
> > > - Cache
> > > - Temperature sensor
> > > - PMIC (AXP15060)
> > > - Restart GPIO
> > > - RNG
> > > - I2C
> > > - SPI
> > > - Quad SPI
> > > - USB & USB 2.0 PHY & PCIe 2.0/USB 3.0 PHY
> > > - Audio (I2S / TDM / PWM-DAC)
> > > - Camera Subsystem & MIPI-CSI2 RX & D-PHY RX
> > >
> > > Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> > > ---
> > >
> > > Hi,
> > >
> > > As more drivers of StarFive JH7110 VisionFive 2 board are upstream,
> > > add support for them in riscv defconfig.
> > >
> > > Best regards,
> > > Hal
> > >
> > > ---
> > > arch/riscv/configs/defconfig | 32 ++++++++++++++++++++++++++++++++
> > > 1 file changed, 32 insertions(+)
> > >
> > > diff --git a/arch/riscv/configs/defconfig
> > > b/arch/riscv/configs/defconfig index fc0ec2ee13bc..a4eb66b30d95
> > > 100644
> > > --- a/arch/riscv/configs/defconfig
> > > +++ b/arch/riscv/configs/defconfig
> > > @@ -111,6 +111,7 @@ CONFIG_PCIE_XILINX=y CONFIG_PCIE_FU740=y
> > > CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y
> > > +CONFIG_SIFIVE_CCACHE=y
> > > CONFIG_MTD=y
> > > CONFIG_MTD_BLOCK=y
> > > CONFIG_MTD_CFI=y
> > > @@ -154,24 +155,36 @@ CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
> > > CONFIG_VIRTIO_CONSOLE=y
> > > CONFIG_HW_RANDOM=y
> > > CONFIG_HW_RANDOM_VIRTIO=y
> > > +CONFIG_HW_RANDOM_JH7110=m
> > > +CONFIG_I2C=y
> > > CONFIG_I2C_CHARDEV=m
> > > +CONFIG_I2C_DESIGNWARE_PLATFORM=y
> > > CONFIG_I2C_MV64XXX=m
> > > CONFIG_I2C_RIIC=y
> > > CONFIG_SPI=y
> > > +CONFIG_SPI_CADENCE_QUADSPI=m
> > > +CONFIG_SPI_PL022=m
> > > CONFIG_SPI_RSPI=m
> > > CONFIG_SPI_SIFIVE=y
> > > CONFIG_SPI_SUN6I=y
> > > # CONFIG_PTP_1588_CLOCK is not set
> > > CONFIG_GPIO_SIFIVE=y
> > > +CONFIG_POWER_RESET_GPIO_RESTART=y
> > > +CONFIG_SENSORS_SFCTEMP=y
>
> If this needs an update anyway this temperature sensor shouldn't be critical to
> boot and can be left as a module.
OK, I will modify accordingly in the next version. Thanks.
Best regards,
Hal
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-05-06 2:57 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-04-03 6:09 [PATCH v1] riscv: defconfig: Enable StarFive JH7110 drivers Hal Feng
2024-04-24 10:58 ` Conor Dooley
2024-05-01 16:09 ` Palmer Dabbelt
2024-05-01 16:25 ` Emil Renner Berthing
2024-05-06 2:31 ` Hal Feng
2024-05-06 2:23 ` Hal Feng
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox