Re: [PATCH v3 43/74] x86/cpu/vfm: Update drivers/cpufreq/intel_pstate.c

Rafael J. Wysocki
2024-04-17T08:21:09Z

On Tue, Apr 16, 2024 at 11:22 PM Tony Luck <tony.luck@intel.com> wrote:
>
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <tony.luck@intel.com>

Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

> ---
> drivers/cpufreq/intel_pstate.c | 90 +++++++++++++++++-----------------
> 1 file changed, 44 insertions(+), 46 deletions(-)
>
> diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
> index dbbf299f4219..685ec80e0af5 100644
> --- a/drivers/cpufreq/intel_pstate.c
> +++ b/drivers/cpufreq/intel_pstate.c
> @@ -2402,52 +2402,51 @@ static const struct pstate_funcs knl_funcs = {
> .get_val = core_get_val,
> };
>
> -#define X86_MATCH(model, policy) \
> - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
> - X86_FEATURE_APERFMPERF, &policy)
> +#define X86_MATCH(vfm, policy) \
> + X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_APERFMPERF, &policy)
>
> static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
> - X86_MATCH(SANDYBRIDGE, core_funcs),
> - X86_MATCH(SANDYBRIDGE_X, core_funcs),
> - X86_MATCH(ATOM_SILVERMONT, silvermont_funcs),
> - X86_MATCH(IVYBRIDGE, core_funcs),
> - X86_MATCH(HASWELL, core_funcs),
> - X86_MATCH(BROADWELL, core_funcs),
> - X86_MATCH(IVYBRIDGE_X, core_funcs),
> - X86_MATCH(HASWELL_X, core_funcs),
> - X86_MATCH(HASWELL_L, core_funcs),
> - X86_MATCH(HASWELL_G, core_funcs),
> - X86_MATCH(BROADWELL_G, core_funcs),
> - X86_MATCH(ATOM_AIRMONT, airmont_funcs),
> - X86_MATCH(SKYLAKE_L, core_funcs),
> - X86_MATCH(BROADWELL_X, core_funcs),
> - X86_MATCH(SKYLAKE, core_funcs),
> - X86_MATCH(BROADWELL_D, core_funcs),
> - X86_MATCH(XEON_PHI_KNL, knl_funcs),
> - X86_MATCH(XEON_PHI_KNM, knl_funcs),
> - X86_MATCH(ATOM_GOLDMONT, core_funcs),
> - X86_MATCH(ATOM_GOLDMONT_PLUS, core_funcs),
> - X86_MATCH(SKYLAKE_X, core_funcs),
> - X86_MATCH(COMETLAKE, core_funcs),
> - X86_MATCH(ICELAKE_X, core_funcs),
> - X86_MATCH(TIGERLAKE, core_funcs),
> - X86_MATCH(SAPPHIRERAPIDS_X, core_funcs),
> - X86_MATCH(EMERALDRAPIDS_X, core_funcs),
> + X86_MATCH(INTEL_SANDYBRIDGE, core_funcs),
> + X86_MATCH(INTEL_SANDYBRIDGE_X, core_funcs),
> + X86_MATCH(INTEL_ATOM_SILVERMONT, silvermont_funcs),
> + X86_MATCH(INTEL_IVYBRIDGE, core_funcs),
> + X86_MATCH(INTEL_HASWELL, core_funcs),
> + X86_MATCH(INTEL_BROADWELL, core_funcs),
> + X86_MATCH(INTEL_IVYBRIDGE_X, core_funcs),
> + X86_MATCH(INTEL_HASWELL_X, core_funcs),
> + X86_MATCH(INTEL_HASWELL_L, core_funcs),
> + X86_MATCH(INTEL_HASWELL_G, core_funcs),
> + X86_MATCH(INTEL_BROADWELL_G, core_funcs),
> + X86_MATCH(INTEL_ATOM_AIRMONT, airmont_funcs),
> + X86_MATCH(INTEL_SKYLAKE_L, core_funcs),
> + X86_MATCH(INTEL_BROADWELL_X, core_funcs),
> + X86_MATCH(INTEL_SKYLAKE, core_funcs),
> + X86_MATCH(INTEL_BROADWELL_D, core_funcs),
> + X86_MATCH(INTEL_XEON_PHI_KNL, knl_funcs),
> + X86_MATCH(INTEL_XEON_PHI_KNM, knl_funcs),
> + X86_MATCH(INTEL_ATOM_GOLDMONT, core_funcs),
> + X86_MATCH(INTEL_ATOM_GOLDMONT_PLUS, core_funcs),
> + X86_MATCH(INTEL_SKYLAKE_X, core_funcs),
> + X86_MATCH(INTEL_COMETLAKE, core_funcs),
> + X86_MATCH(INTEL_ICELAKE_X, core_funcs),
> + X86_MATCH(INTEL_TIGERLAKE, core_funcs),
> + X86_MATCH(INTEL_SAPPHIRERAPIDS_X, core_funcs),
> + X86_MATCH(INTEL_EMERALDRAPIDS_X, core_funcs),
> {}
> };
> MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
>
> static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] __initconst = {
> - X86_MATCH(BROADWELL_D, core_funcs),
> - X86_MATCH(BROADWELL_X, core_funcs),
> - X86_MATCH(SKYLAKE_X, core_funcs),
> - X86_MATCH(ICELAKE_X, core_funcs),
> - X86_MATCH(SAPPHIRERAPIDS_X, core_funcs),
> + X86_MATCH(INTEL_BROADWELL_D, core_funcs),
> + X86_MATCH(INTEL_BROADWELL_X, core_funcs),
> + X86_MATCH(INTEL_SKYLAKE_X, core_funcs),
> + X86_MATCH(INTEL_ICELAKE_X, core_funcs),
> + X86_MATCH(INTEL_SAPPHIRERAPIDS_X, core_funcs),
> {}
> };
>
> static const struct x86_cpu_id intel_pstate_cpu_ee_disable_ids[] = {
> - X86_MATCH(KABYLAKE, core_funcs),
> + X86_MATCH(INTEL_KABYLAKE, core_funcs),
> {}
> };
>
> @@ -3386,14 +3385,13 @@ static inline void intel_pstate_request_control_from_smm(void) {}
>
> #define INTEL_PSTATE_HWP_BROADWELL 0x01
>
> -#define X86_MATCH_HWP(model, hwp_mode) \
> - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
> - X86_FEATURE_HWP, hwp_mode)
> +#define X86_MATCH_HWP(vfm, hwp_mode) \
> + X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_HWP, hwp_mode)
>
> static const struct x86_cpu_id hwp_support_ids[] __initconst = {
> - X86_MATCH_HWP(BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL),
> - X86_MATCH_HWP(BROADWELL_D, INTEL_PSTATE_HWP_BROADWELL),
> - X86_MATCH_HWP(ANY, 0),
> + X86_MATCH_HWP(INTEL_BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL),
> + X86_MATCH_HWP(INTEL_BROADWELL_D, INTEL_PSTATE_HWP_BROADWELL),
> + X86_MATCH_HWP(INTEL_ANY, 0),
> {}
> };
>
> @@ -3426,15 +3424,15 @@ static const struct x86_cpu_id intel_epp_default[] = {
> * which can result in one core turbo frequency for
> * AlderLake Mobile CPUs.
> */
> - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, HWP_SET_DEF_BALANCE_PERF_EPP(102)),
> - X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP(32)),
> - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE,
> - HWP_EPP_BALANCE_POWERSAVE, 115, 16)),
> + X86_MATCH_VFM(INTEL_ALDERLAKE_L, HWP_SET_DEF_BALANCE_PERF_EPP(102)),
> + X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP(32)),
> + X86_MATCH_VFM(INTEL_METEORLAKE_L, HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE,
> + HWP_EPP_BALANCE_POWERSAVE, 115, 16)),
> {}
> };
>
> static const struct x86_cpu_id intel_hybrid_scaling_factor[] = {
> - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, HYBRID_SCALING_FACTOR_MTL),
> + X86_MATCH_VFM(INTEL_METEORLAKE_L, HYBRID_SCALING_FACTOR_MTL),
> {}
> };
>
> --
> 2.44.0
>