Re: [PATCH v3 0/7] ipq9574: Enable PCI-Express support

mr.nuke.me
2024-04-19T19:47:48Z

Hi Kathiravan,

On 4/19/24 09:28, Kathiravan Thirumoorthy wrote:
>
>
> On 4/15/2024 11:50 PM, Alexandru Gagniuc wrote:
>> There are four PCIe ports on IPQ9574, pcie0 thru pcie3. This series
>> addresses pcie2, which is a gen3x2 port. The board I have only uses
>> pcie2, and that's the only one enabled in this series.
>>
>> I believe this makes sense as a monolithic series, as the individual
>> pieces are not that useful by themselves.
>>
>> In v2, I've had some issues regarding the dt schema checks. For
>> transparency, I used the following test invocations to test v3:
>>
>>        make dt_binding_check
>> DT_SCHEMA_FILES=qcom,pcie.yaml:qcom,ipq8074-qmp-pcie-phy.yaml
>>        make dtbs_check
>> DT_SCHEMA_FILES=qcom,pcie.yaml:qcom,ipq8074-qmp-pcie-phy.yaml
>>
>>
>
> Alexandru,
>
> Thanks for your contributions to the Qualcomm IPQ chipsets.
>
> I would like to inform you that we have also submitted the patches to
> enable the PCIe support on IPQ9574[1][2] and waiting for the ICC
> support[3] to land to enable the NOC clocks.
>
> [1]
> https://lore.kernel.org/linux-arm-msm/20230519090219.15925-1-quic_devipriy@quicinc.com/
> [2]
> https://lore.kernel.org/linux-arm-msm/20230519085723.15601-1-quic_devipriy@quicinc.com/
> [3]
> https://lore.kernel.org/linux-arm-msm/20240418092305.2337429-1-quic_varada@quicinc.com/
>
> Please take a look at these patches as well.

I think I've seen [1] before -- I thought the series was abandoned.
Since we have the dt-schema and applicability on mainline resolved here,
do you want to use this series as the base for any new PCIe work?

Alex

> Thanks,
> Kathiravan T.
>
>
>> Changes since v2:
>>   - reworked resets in qcom,pcie.yaml to resolve dt schema errors
>>   - constrained "reg" in qcom,pcie.yaml
>>   - reworked min/max intems in qcom,ipq8074-qmp-pcie-phy.yaml
>>   - dropped msi-parent for pcie node, as it is handled by "msi" IRQ
>>
>> Changes since v1:
>>   - updated new tables in phy-qcom-qmp-pcie.c to use lowercase hex
>> numbers
>>   - reorganized qcom,ipq8074-qmp-pcie-phy.yaml to use a single list of
>> clocks
>>   - reorganized qcom,pcie.yaml to include clocks+resets per compatible
>>   - Renamed "pcie2_qmp_phy" label to "pcie2_phy"
>>   - moved "ranges" property of pcie@20000000 higher up
>>
>> Alexandru Gagniuc (7):
>>    dt-bindings: clock: Add PCIe pipe related clocks for IPQ9574
>>    clk: qcom: gcc-ipq9574: Add PCIe pipe clocks
>>    dt-bindings: PCI: qcom: Add IPQ9574 PCIe controller
>>    PCI: qcom: Add support for IPQ9574
>>    dt-bindings: phy: qcom,ipq8074-qmp-pcie: add ipq9574 gen3x2 PHY
>>    phy: qcom-qmp-pcie: add support for ipq9574 gen3x2 PHY
>>    arm64: dts: qcom: ipq9574: add PCIe2 nodes
>>
>>   .../devicetree/bindings/pci/qcom,pcie.yaml    |  35 +++++
>>   .../phy/qcom,ipq8074-qmp-pcie-phy.yaml        |  36 ++++-
>>   arch/arm64/boot/dts/qcom/ipq9574.dtsi         |  93 +++++++++++-
>>   drivers/clk/qcom/gcc-ipq9574.c                |  76 ++++++++++
>>   drivers/pci/controller/dwc/pcie-qcom.c        |  13 +-
>>   drivers/phy/qualcomm/phy-qcom-qmp-pcie.c      | 136 +++++++++++++++++-
>>   .../phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5.h   |  14 ++
>>   include/dt-bindings/clock/qcom,ipq9574-gcc.h  |   4 +
>>   8 files changed, 400 insertions(+), 7 deletions(-)
>>