Re: [PATCH v3 00/12] Coalesced Interrupt Delivery with posted MSI

Luigi Rizzo
2025-11-24T22:41:30Z

On Mon, Nov 24, 2025 at 7:59 PM Thomas Gleixner <tglx@linutronix.de> wrote:
>
> On Mon, Nov 24 2025 at 10:48, Luigi Rizzo wrote:
> > I think there is an inherent race condition when intremap=posted_msi
> > and the IRQ subsystem resends pending interrupts via __apic_send_IPI().
> > ...
...
> It sends an IPI to the actual vector, which invokes the handler
> directly. That works only once because the remap interrupt chip does not
> issue an EOI, so the vector becomes stale.... Clearly nobody ever tested
> that code.

Thanks for clarifying that the problem is the missing EOI.

> ...
> So instead of playing games with the PIR, this can be actually solved
> for both cases. See below.

Thanks, I verified that your patch fixes the problem (and also works
with software moderation)

Tested-by: Luigi Rizzo <lrizzo@google.com>

cheers
luigi