From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 27363137935; Tue, 7 May 2024 23:11:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715123504; cv=none; b=kMygbCgxmVPzLyIfSuDcUA+TiJN/nymI90ndwpM81/KvTYF3kwNQYAAclok+QVwTpWi1MPgMKpzb6l0jzksorDdveRnFBRAJR7ZySxA0AqgnjiSMymwYsWGcPEMc1V3pTRg1wZRGRScvwCb+cWgNPLboY2w3AcvWPvoniZLnGd4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715123504; c=relaxed/simple; bh=Oee1mEmDe4fJORTNYlBmozOCK+/EOLdQWjbFJ7XwXko=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=D+BoO1TX4nJ8bjvBkHwM/+8aiBVSUMn9EvV5gJ+J6Sp/WmO3b5XZrK7HrD88eQJ4oa4YcpDT9yiMahR/laYETNOJUWi/AfqRxVLpOQ3ymeDqBgui5TA2/gbfi/aM80hy6om5P7SrKRqrUtRiY15qsUZfAvWw+Lwo014+8ZpCioM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=AfP3ndY6; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="AfP3ndY6" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 32692C3277B; Tue, 7 May 2024 23:11:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715123504; bh=Oee1mEmDe4fJORTNYlBmozOCK+/EOLdQWjbFJ7XwXko=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AfP3ndY6vpqubrqvh8tIlVnEmKlnDD+8+piX5VD64ZIToaDtngWh5eZ1e0iBe4Dh8 RORolAHHaqtJCZmQhwKTTxew8Z/vUW6RlddJ/SDNbf//GWEbIRe/oltlOzvmy8Y6xq 1R6aFIcNhDuLLYx95RfeQbhgnTuwtVGrfxsQYKsoqQwtON1t7z+XxwHlGu1VdRfbFb hTqlvOUCkrnV+lA7KIT62jIN0kv9E0jQ+KubfQU7Ic8zpPwTcHsojAmYdaybqjjRNz KUgNqL/uI5xGFy3zC6krhmQ0vq4mG8fwvxp9cvHYm9Ye7m4rO6J6W2X16LLhcV54Co sfHvBZCYS5Qdw== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Rodrigo Siqueira , Wayne Lin , Daniel Wheeler , Alex Deucher , Sasha Levin , harry.wentland@amd.com, sunpeng.li@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch, qingqing.zhuo@amd.com, eric.bernstein@amd.com, chiahsuan.chung@amd.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 6.6 32/43] drm/amd/display: Add VCO speed parameter for DCN31 FPU Date: Tue, 7 May 2024 19:09:53 -0400 Message-ID: <20240507231033.393285-32-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240507231033.393285-1-sashal@kernel.org> References: <20240507231033.393285-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 6.6.30 Content-Transfer-Encoding: 8bit From: Rodrigo Siqueira [ Upstream commit 0e62103bdcbc88281e16add299a946fb3bd02fbe ] Add VCO speed parameters in the bounding box array. Acked-by: Wayne Lin Signed-off-by: Rodrigo Siqueira Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c index deb6d162a2d5c..7307b7b8d8ad7 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c @@ -291,6 +291,7 @@ static struct _vcs_dpi_soc_bounding_box_st dcn3_15_soc = { .do_urgent_latency_adjustment = false, .urgent_latency_adjustment_fabric_clock_component_us = 0, .urgent_latency_adjustment_fabric_clock_reference_mhz = 0, + .dispclk_dppclk_vco_speed_mhz = 2400.0, .num_chans = 4, .dummy_pstate_latency_us = 10.0 }; @@ -438,6 +439,7 @@ static struct _vcs_dpi_soc_bounding_box_st dcn3_16_soc = { .do_urgent_latency_adjustment = false, .urgent_latency_adjustment_fabric_clock_component_us = 0, .urgent_latency_adjustment_fabric_clock_reference_mhz = 0, + .dispclk_dppclk_vco_speed_mhz = 2500.0, }; void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes, -- 2.43.0