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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: linux-pci@vger.kernel.org, "Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Lukas Wunner" <lukas@wunner.de>,
	"Alexandru Gagniuc" <mr.nuke.me@gmail.com>,
	"Krishna chaitanya chundru" <quic_krichai@quicinc.com>,
	"Srinivas Pandruvada" <srinivas.pandruvada@linux.intel.com>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	linux-pm@vger.kernel.org,
	"Daniel Lezcano" <daniel.lezcano@linaro.org>,
	"Zhang Rui" <rui.zhang@intel.com>,
	"Lukasz Luba" <lukasz.luba@arm.com>,
	linux-kernel@vger.kernel.org, "Amit Kucheria" <amitk@kernel.org>,
	"Christophe JAILLET" <christophe.jaillet@wanadoo.fr>
Subject: Re: [PATCH v5 7/8] thermal: Add PCIe cooling driver
Date: Thu, 9 May 2024 12:59:36 +0100	[thread overview]
Message-ID: <20240509125936.00004f30@Huawei.com> (raw)
In-Reply-To: <20240508134744.52134-8-ilpo.jarvinen@linux.intel.com>

On Wed,  8 May 2024 16:47:43 +0300
Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> wrote:

> Add a thermal cooling driver to provide path to access PCIe bandwidth
> controller using the usual thermal interfaces.
> 
> A cooling device is instantiated for controllable PCIe Ports from the
> bwctrl service driver.
> 
> The thermal side state 0 means no throttling, i.e., maximum supported
> PCIe Link Speed.
> 
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
> Acked-by: Rafael J. Wysocki <rafael@kernel.org> # From the cooling device interface perspective

> +struct thermal_cooling_device *pcie_cooling_device_register(struct pci_dev *port)
> +{
> +	struct thermal_cooling_device *cdev;
> +	char *name;
> +
> +	name = kasprintf(GFP_KERNEL, COOLING_DEV_TYPE_PREFIX "%s", pci_name(port));
> +	if (!name)
> +		return ERR_PTR(-ENOMEM);
> +
> +	cdev = thermal_cooling_device_register(name, port, &pcie_cooling_ops);
> +	kfree(name);

__free?  Only small saving, but I think it's just about worth it to
give you
	return thermal_cooling_device_register()
and drop the local cdev variable.


> +
> +	return cdev;
> +}

Otherwise LGTM
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>



  reply	other threads:[~2024-05-09 11:59 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-08 13:47 [PATCH v5 0/8] PCI: Add PCIe bandwidth controller Ilpo Järvinen
2024-05-08 13:47 ` [PATCH v5 1/8] PCI: Protect Link Control 2 Register with RMW locking Ilpo Järvinen
2024-05-08 13:47 ` [PATCH v5 2/8] PCI: Store all PCIe Supported Link Speeds Ilpo Järvinen
2024-05-08 13:47 ` [PATCH v5 3/8] PCI: Refactor pcie_update_link_speed() Ilpo Järvinen
2024-05-08 13:47 ` [PATCH v5 4/8] PCI/quirks: Abstract LBMS seen check into own function Ilpo Järvinen
2024-05-08 13:47 ` [PATCH v5 5/8] PCI/bwctrl: Re-add BW notification portdrv as PCIe BW controller Ilpo Järvinen
2024-05-09 11:39   ` Jonathan Cameron
2024-05-08 13:47 ` [PATCH v5 6/8] PCI/bwctrl: Add API to set PCIe Link Speed Ilpo Järvinen
2024-05-09 11:53   ` Jonathan Cameron
2024-05-10 10:32     ` Ilpo Järvinen
2024-05-08 13:47 ` [PATCH v5 7/8] thermal: Add PCIe cooling driver Ilpo Järvinen
2024-05-09 11:59   ` Jonathan Cameron [this message]
2024-05-08 13:47 ` [PATCH v5 8/8] selftests/pcie_bwctrl: Create selftests Ilpo Järvinen

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