Re: [PATCH v2 5/5] usb: host: xhci-plat: Add support for XHCI_WRITE_64_HI_LO_QUIRK

Jung Daehwan
2024-06-03T03:44:03Z

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On Fri, May 31, 2024 at 10:12:36AM +0200, Krzysztof Kozlowski wrote:
> On 31/05/2024 08:07, Daehwan Jung wrote:
> > This is set by dwc3 parent node to support writing high-low order.
> >
> > Signed-off-by: Daehwan Jung <dh10.jung@samsung.com>
> > ---
> > drivers/usb/host/xhci-plat.c | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
> > index 3d071b8..31bdfa5 100644
> > --- a/drivers/usb/host/xhci-plat.c
> > +++ b/drivers/usb/host/xhci-plat.c
> > @@ -256,6 +256,9 @@ int xhci_plat_probe(struct platform_device *pdev, struct device *sysdev, const s
> > if (device_property_read_bool(tmpdev, "xhci-sg-trb-cache-size-quirk"))
> > xhci->quirks |= XHCI_SG_TRB_CACHE_SIZE_QUIRK;
> >
> > + if (device_property_read_bool(tmpdev, "write-64-hi-lo-quirk"))
> > + xhci->quirks |= XHCI_WRITE_64_HI_LO;
>
> Where is any user of this property (DTS)? Just to clarify: your
> downstream does not matter really.
>

This is set by dwc3 parent node by software node.

[PATCH v2 1/5] dt-bindings: usb: snps,dwc3: Add 'snps,xhci-write-64-hi-lo-quirk' quirk
https://lore.kernel.org/r/1717135657-120818-2-git-send-email-dh10.jung@samsung.com/

Best Regards,
Jung Daehwan

> Best regards,
> Krzysztof
>
>

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