Re: [PATCH 1/5] clk: rockchip: rk3128: Drop CLK_NR_CLKS usage

Alex Bee
2024-06-05T21:03:37Z

Hi,
sorry for the noise - not sure what went wrong here.
Just resend v2:
https://lore.kernel.org/all/20240605210049.232284-1-knaerzche@gmail.com/

Alex
Am 05.06.24 um 22:51 schrieb Alex Bee:
> Similar to
> commit 2dc66a5ab2c6 ("clk: rockchip: rk3588: fix CLK_NR_CLKS usage")
> this drops CLK_NR_CLKS usage from the clock driver and instead uses the
> rockchip_clk_find_max_clk_id helper which was introduced for that purpose.
>
> Signed-off-by: Alex Bee <knaerzche@gmail.com>
> ---
> drivers/clk/rockchip/clk-rk3128.c | 20 ++++++++++++++++----
> 1 file changed, 16 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/clk/rockchip/clk-rk3128.c b/drivers/clk/rockchip/clk-rk3128.c
> index d076b7971f33..40e0e4556d59 100644
> --- a/drivers/clk/rockchip/clk-rk3128.c
> +++ b/drivers/clk/rockchip/clk-rk3128.c
> @@ -569,18 +569,22 @@ static const char *const rk3128_critical_clocks[] __initconst = {
> "sclk_timer5",
> };
>
> -static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np)
> +static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np,
> + unsigned long soc_nr_clks)
> {
> struct rockchip_clk_provider *ctx;
> + unsigned long common_nr_clks;
> void __iomem *reg_base;
>
> + common_nr_clks = rockchip_clk_find_max_clk_id(common_clk_branches,
> + ARRAY_SIZE(common_clk_branches)) + 1;
> reg_base = of_iomap(np, 0);
> if (!reg_base) {
> pr_err("%s: could not map cru region\n", __func__);
> return ERR_PTR(-ENOMEM);
> }
>
> - ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS);
> + ctx = rockchip_clk_init(np, reg_base, max(common_nr_clks, soc_nr_clks));
> if (IS_ERR(ctx)) {
> pr_err("%s: rockchip clk init failed\n", __func__);
> iounmap(reg_base);
> @@ -609,8 +613,12 @@ static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device
> static void __init rk3126_clk_init(struct device_node *np)
> {
> struct rockchip_clk_provider *ctx;
> + unsigned long soc_nr_clks;
>
> - ctx = rk3128_common_clk_init(np);
> + soc_nr_clks = rockchip_clk_find_max_clk_id(rk3126_clk_branches,
> + ARRAY_SIZE(rk3126_clk_branches)) + 1;
> +
> + ctx = rk3128_common_clk_init(np, soc_nr_clks);
> if (IS_ERR(ctx))
> return;
>
> @@ -627,8 +635,12 @@ CLK_OF_DECLARE(rk3126_cru, "rockchip,rk3126-cru", rk3126_clk_init);
> static void __init rk3128_clk_init(struct device_node *np)
> {
> struct rockchip_clk_provider *ctx;
> + unsigned long soc_nr_clks;
> +
> + soc_nr_clks = rockchip_clk_find_max_clk_id(rk3128_clk_branches,
> + ARRAY_SIZE(rk3128_clk_branches)) + 1;
>
> - ctx = rk3128_common_clk_init(np);
> + ctx = rk3128_common_clk_init(np, soc_nr_clks);
> if (IS_ERR(ctx))
> return;
>