From: kan.liang@linux.intel.com
To: peterz@infradead.org, mingo@kernel.org, linux-kernel@vger.kernel.org
Cc: acme@kernel.org, namhyung@kernel.org, irogers@google.com,
eranian@google.com, ak@linux.intel.com, yunying.sun@intel.com,
Kan Liang <kan.liang@linux.intel.com>
Subject: [PATCH 0/8] Support HBM and CXL PMON uncore counters
Date: Mon, 10 Jun 2024 13:16:11 -0700 [thread overview]
Message-ID: <20240610201619.884021-1-kan.liang@linux.intel.com> (raw)
From: Kan Liang <kan.liang@linux.intel.com>
The uncore PMON information of both HBM and CXL can be retrieved from
the discovery table. However, the CXL entries break the driver's
assumption for the discovery table. The first 7 patches update the
generic support of the discovery table. The last patch enables the HBM
and CXL PMON uncore counters.
The discovery table support was introduced since commit edae1f06c2cd
("perf/x86/intel/uncore: Parse uncore discovery tables"). It's a
self-describing mechanism for the uncore PerfMon hardware. By reading
through an MMIO page worth of information, SW can ‘discover’ all the
standard uncore PMON registers.
The entire discovery table could be big and contain duplicate
information. To save space, the perf uncore driver only stores some key
data. Others are calculated from the key data. The driver further
assumes that the uncore PMON units are symmetric among dies.
So only the unit control addresses on Die 0 are completely stored.
The addresses on other Dies can be calculated via the address of the
first entry on the Die + a fixed offset.
However, it doesn't work for the CXL PMON units. The CXL PMON units
could be asymmetric among Dies. The offset between CXL PMON units may be
different on different Die.
To address the issue, the complete unit control addresses for all
Dies are stored in an RB tree. For a 2-socket EMR, it requires
at most ~6KB extra space, which should be acceptable.
Kan Liang (8):
perf/x86/uncore: Save the unit control address of all units
perf/x86/uncore: Support per PMU cpumask
perf/x86/uncore: Retrieve the unit ID from the unit control RB tree
perf/x86/uncore: Apply the unit control RB tree to MMIO uncore units
perf/x86/uncore: Apply the unit control RB tree to MSR uncore units
perf/x86/uncore: Apply the unit control RB tree to PCI uncore units
perf/x86/uncore: Cleanup unused unit structure
perf/x86/intel/uncore: Support HBM and CXL PMON counters
arch/x86/events/intel/uncore.c | 97 ++++---
arch/x86/events/intel/uncore.h | 8 +-
arch/x86/events/intel/uncore_discovery.c | 306 +++++++++++++++--------
arch/x86/events/intel/uncore_discovery.h | 22 +-
arch/x86/events/intel/uncore_snbep.c | 128 ++++++++--
5 files changed, 388 insertions(+), 173 deletions(-)
--
2.35.1
next reply other threads:[~2024-06-10 20:17 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-10 20:16 kan.liang [this message]
2024-06-10 20:16 ` [PATCH 1/8] perf/x86/uncore: Save the unit control address of all units kan.liang
2024-06-10 22:40 ` Tim Chen
2024-06-12 14:49 ` Liang, Kan
2024-06-12 17:08 ` Tim Chen
2024-06-12 17:33 ` Tim Chen
2024-06-12 19:25 ` Liang, Kan
2024-06-10 20:16 ` [PATCH 2/8] perf/x86/uncore: Support per PMU cpumask kan.liang
2024-06-10 20:16 ` [PATCH 3/8] perf/x86/uncore: Retrieve the unit ID from the unit control RB tree kan.liang
2024-06-10 20:16 ` [PATCH 4/8] perf/x86/uncore: Apply the unit control RB tree to MMIO uncore units kan.liang
2024-06-10 20:16 ` [PATCH 5/8] perf/x86/uncore: Apply the unit control RB tree to MSR " kan.liang
2024-06-10 20:16 ` [PATCH 6/8] perf/x86/uncore: Apply the unit control RB tree to PCI " kan.liang
2024-06-10 20:16 ` [PATCH 7/8] perf/x86/uncore: Cleanup unused unit structure kan.liang
2024-06-10 20:16 ` [PATCH 8/8] perf/x86/intel/uncore: Support HBM and CXL PMON counters kan.liang
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