Re: [RESEND PATCH 02/12] perf/x86: Support counter mask

Peter Zijlstra
2024-06-20T07:07:00Z

On Tue, Jun 18, 2024 at 08:10:34AM -0700, kan.liang@linux.intel.com wrote:

> + for_each_set_bit(idx, c->idxmsk, x86_pmu_num_counters(NULL)) {
> if (new == -1 || hwc->idx == idx)
> /* assign free slot, prefer hwc->idx */
> old = cmpxchg(nb->owners + idx, NULL, event);

> +static inline int x86_pmu_num_counters_fixed(struct pmu *pmu)
> +{
> + return hweight64(hybrid(pmu, fixed_cntr_mask64));
> +}

This is wrong. You don't iterate a bitmask by the number of bits set,
but by the highest set bit in the mask.