Re: [PATCH v4] Subject: PCI: Enable io space 1k granularity for intel cpu root port

Zhou Shengqing
2024-07-24T03:38:33Z

> On 7/23/2024 4:04 PM, Zhou Shengqing wrote:
> >> I think this has potential. Can you include a more complete citation
> >> for the Intel spec? Complete name, document number if available,
> >> revision, section? Hopefully it's publically available?
> > Most of intel CPU EDS specs are under NDA. But you can refer to
> > https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/xeon-e5-v2-datasheet-vol-2.pdf
> > keyword:"EN1K".
> > ...
> >
> > while ((d = pci_get_device(PCI_VENDOR_ID_INTEL, 0x09a2, d))) {
> > if (pci_domain_nr(d->bus) == pci_domain_nr(dev->bus)) {
>
> Perhaps it is enough to check if the 0x09a2 VT-d and the rootport are on the smae bus
> e.g. On my SPR, domain 0000

Thank you for your comment.

Do you mean it shoud be like this?

while ((d = pci_get_device(PCI_VENDOR_ID_INTEL, 0x09a2, d))) {
if (d->bus->number == dev->bus->number) {
pci_read_config_word(d, 0x1c0, &en1k);
if (en1k & 0x4) {
pci_info(dev, "1K I/O windows enabled per %s EN1K setting\n", pci_name(d));
dev->io_window_1k = 1;
}
}
}

>
> 00:00.0 System peripheral: Intel Corporation Device 09a2 (rev 20)
> 00:0f.0 PCI bridge: Intel Corporation Device 1bbf (rev 10) (prog-if 00 [Normal decode])
>
>
> 15:00.0 System peripheral: Intel Corporation Device 09a2 (rev 20)
> 15:01.0 PCI bridge: Intel Corporation Device 352a (rev 04) (prog-if 00 [Normal decode])
>
> and if you check domain number only, they might sit on different bus, perhaps that
> would make thing complex, could you make sure the VT-d is on the upstream bus of the
> bridge ?

I checked it on ICX SPR EMR GNR, VT-d is always on the same bus with root port,
and VT-d device and function number is always 0.

Please let me know if further modifications are needed.

>
> Thanks,
> Ethan