Re: Re: [PATCH] PCI: Enable io space 1k granularity for intel cpu root port

Zhou Shengqing
2024-06-23T02:41:50Z

>On Sat, Jun 22, 2024 at 11:06:18PM +0800, zhoushengqing@ttyinfo.com wrote:
>> >> This patch add 1k granularity for intel root port bridge.Intel latest
>>
>>
>>
>> >> server CPU support 1K granularity,And there is an BIOS setup item named
>>
>>
>>
>
>I don't know what your email agent is doing to add all these extra
>blank lines, but it makes it painful to read/reply:
>https://lore.kernel.org/all/2024062223061743562815@ttyinfo.com/
>

I'm sorry for the mistake I made in my email client settings.

>> >Can you implement this as a quirk similar to quirk_p64h2_1k_io()?
>> >
>> >I don't want to clutter the generic code with device-specific
>> >things like this.
>>
>> I have attempted to implement this patch in quirks.c.But there
>> doesn't seem to be a suitable DECLARE_PCI_FIXUP* to do this.because
>> the patch is not targeting the device itself, It targets other P2P
>> devices with the same bus number.
>
>If I understand the patch correctly, if a [8086:09a2] device on a root
>bus has EN1K set, *every* bridge (every Root Port in this case because
>I assume this is a PCIe configuration) on the same bus supports 1K
>granularity?
>
>That seems like a really broken kind of encapsulation. I'd be
>surprised if there were not a bit in each of those Root Ports that
>indicates this.

Your understanding is completely correct.intel ICX SPR RMR (even GNR)
CPU EDS Vol2(register) spec says "This bit when set, enables 1K granularity
for I/O space decode in each of the virtual P2P bridges corresponding to
root ports,and DMI ports." it targets all P2P bridges within the same root bus,
not the root port itself.The root ports configuration space doesn't have a
"EN1K" bit.