From: Lu Baolu <baolu.lu@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Jason Gunthorpe <jgg@ziepe.ca>, Kevin Tian <kevin.tian@intel.com>
Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org,
Lu Baolu <baolu.lu@linux.intel.com>
Subject: [PATCH v2 0/2] iommu/vt-d: Refactor PRI enable/disable steps
Date: Thu, 27 Jun 2024 10:31:19 +0800 [thread overview]
Message-ID: <20240627023121.50166-1-baolu.lu@linux.intel.com> (raw)
The page fault handling framework within the iommu core has defined the
PRI enable and disable flows in the comments for the
iopf_queue_remove_device() interface. This series aims to refactor the
PRI enable/disable steps in the Intel iommu driver to align with these
definitions.
Change log:
v2:
- The cache invalidation for a context entry change should not affect
the devices not related to the entry. Fix this by always using
device-selective cache invalidation.
v1:
- https://lore.kernel.org/linux-iommu/20240606034019.42795-1-baolu.lu@linux.intel.com/
Lu Baolu (2):
iommu/vt-d: Add helper to flush caches for context change
iommu/vt-d: Refactor PCI PRI enabling/disabling callbacks
drivers/iommu/intel/iommu.h | 13 +++++
drivers/iommu/intel/iommu.c | 89 ++++++++++++++++++-------------
drivers/iommu/intel/pasid.c | 103 ++++++++++++++++++++++++++++--------
3 files changed, 148 insertions(+), 57 deletions(-)
--
2.34.1
next reply other threads:[~2024-06-27 2:34 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-27 2:31 Lu Baolu [this message]
2024-06-27 2:31 ` [PATCH v2 1/2] iommu/vt-d: Add helper to flush caches for context change Lu Baolu
2024-06-27 6:08 ` Tian, Kevin
2024-06-27 8:21 ` Baolu Lu
2024-06-28 7:43 ` Tian, Kevin
2024-06-28 11:24 ` Baolu Lu
2024-07-01 6:39 ` Tian, Kevin
2024-07-02 0:23 ` Jacob Pan
2024-07-02 2:54 ` Baolu Lu
2024-06-27 2:31 ` [PATCH v2 2/2] iommu/vt-d: Refactor PCI PRI enabling/disabling callbacks Lu Baolu
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