From: Jacob Pan <jacob.jun.pan@linux.intel.com>
To: Lu Baolu <baolu.lu@linux.intel.com>
Cc: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Jason Gunthorpe <jgg@ziepe.ca>, Kevin Tian <kevin.tian@intel.com>,
iommu@lists.linux.dev, linux-kernel@vger.kernel.org,
jacob.jun.pan@linux.intel.com
Subject: Re: [PATCH v3 1/2] iommu/vt-d: Add helper to flush caches for context change
Date: Mon, 1 Jul 2024 21:41:28 -0700 [thread overview]
Message-ID: <20240701214128.5523a1ea@jacob-builder> (raw)
In-Reply-To: <20240701112317.94022-2-baolu.lu@linux.intel.com>
On Mon, 1 Jul 2024 19:23:16 +0800, Lu Baolu <baolu.lu@linux.intel.com>
wrote:
> + if (flush_domains) {
> + /*
> + * If the IOMMU is running in scalable mode and there
> might
> + * be potential PASID translations, the caller should
> hold
> + * the lock to ensure that context changes and cache
> flushes
> + * are atomic.
> + */
> + assert_spin_locked(&iommu->lock);
> + for (i = 0; i < info->pasid_table->max_pasid; i++) {
> + pte = intel_pasid_get_entry(info->dev, i);
> + if (!pte || !pasid_pte_is_present(pte))
> + continue;
Is it worth going through 1M PASIDs just to skip the PASID cache
invalidation? Or just do the flush on all used DIDs unconditionally.
> + did = pasid_get_domain_id(pte);
> + qi_flush_pasid_cache(iommu, did,
> QI_PC_ALL_PASIDS, 0);
> + iommu->flush.flush_iotlb(iommu, did, 0, 0,
> DMA_TLB_DSI_FLUSH);
> + }
> + }
Thanks,
Jacob
next prev parent reply other threads:[~2024-07-02 4:36 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-01 11:23 [PATCH v3 0/2] iommu/vt-d: Refactor PRI enable/disable steps Lu Baolu
2024-07-01 11:23 ` [PATCH v3 1/2] iommu/vt-d: Add helper to flush caches for context change Lu Baolu
2024-07-02 1:11 ` Tian, Kevin
2024-07-02 1:47 ` Baolu Lu
2024-07-02 2:43 ` Baolu Lu
2024-07-02 4:51 ` Baolu Lu
2024-07-02 6:25 ` Yi Liu
2024-07-02 6:39 ` Tian, Kevin
2024-07-02 8:03 ` Baolu Lu
2024-07-02 4:41 ` Jacob Pan [this message]
2024-07-02 4:43 ` Baolu Lu
2024-07-02 15:57 ` Jacob Pan
2024-07-03 2:49 ` Baolu Lu
2024-07-03 21:35 ` Jacob Pan
2024-07-01 11:23 ` [PATCH v3 2/2] iommu/vt-d: Refactor PCI PRI enabling/disabling callbacks Lu Baolu
2024-07-02 1:11 ` Tian, Kevin
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