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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240724022719.2868490-2-quic_pyarlaga@quicinc.com> On Tue, Jul 23, 2024 at 07:27:18PM -0700, Prudhvi Yarlagadda wrote: Subject could be modified as below: PCI: dwc: Cache DBI and iATU physical addresses in 'struct dw_pcie_ops' > Both DBI and ATU physical base addresses are needed by pcie_qcom.c > driver to program the location of DBI and ATU blocks in Qualcomm > PCIe Controller specific PARF hardware block. > > Signed-off-by: Prudhvi Yarlagadda Suggested-by: Manivannan Sadhasivam Reviewed-by: Manivannan Sadhasivam - Mani > Reviewed-by: Mayank Rana > --- > drivers/pci/controller/dwc/pcie-designware.c | 2 ++ > drivers/pci/controller/dwc/pcie-designware.h | 2 ++ > 2 files changed, 4 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c > index 1b5aba1f0c92..bc3a5d6b0177 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.c > +++ b/drivers/pci/controller/dwc/pcie-designware.c > @@ -112,6 +112,7 @@ int dw_pcie_get_resources(struct dw_pcie *pci) > pci->dbi_base = devm_pci_remap_cfg_resource(pci->dev, res); > if (IS_ERR(pci->dbi_base)) > return PTR_ERR(pci->dbi_base); > + pci->dbi_phys_addr = res->start; > } > > /* DBI2 is mainly useful for the endpoint controller */ > @@ -134,6 +135,7 @@ int dw_pcie_get_resources(struct dw_pcie *pci) > pci->atu_base = devm_ioremap_resource(pci->dev, res); > if (IS_ERR(pci->atu_base)) > return PTR_ERR(pci->atu_base); > + pci->atu_phys_addr = res->start; > } else { > pci->atu_base = pci->dbi_base + DEFAULT_DBI_ATU_OFFSET; > } > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h > index 53c4c8f399c8..efc72989330c 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.h > +++ b/drivers/pci/controller/dwc/pcie-designware.h > @@ -407,8 +407,10 @@ struct dw_pcie_ops { > struct dw_pcie { > struct device *dev; > void __iomem *dbi_base; > + phys_addr_t dbi_phys_addr; > void __iomem *dbi_base2; > void __iomem *atu_base; > + phys_addr_t atu_phys_addr; > size_t atu_size; > u32 num_ib_windows; > u32 num_ob_windows; > -- > 2.25.1 > -- மணிவண்ணன் சதாசிவம்