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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240716213131.6036-6-james.quinlan@broadcom.com> On Tue, Jul 16, 2024 at 05:31:20PM -0400, Jim Quinlan wrote: > The 7712 SOC adds a software init reset device for the PCIe HW. > If found in the DT node, use it. > > Signed-off-by: Jim Quinlan > Reviewed-by: Stanimir Varbanov > Reviewed-by: Florian Fainelli > --- > drivers/pci/controller/pcie-brcmstb.c | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c > index 92816d8d215a..4dc2ff7f3167 100644 > --- a/drivers/pci/controller/pcie-brcmstb.c > +++ b/drivers/pci/controller/pcie-brcmstb.c > @@ -266,6 +266,7 @@ struct brcm_pcie { > struct reset_control *rescal; > struct reset_control *perst_reset; > struct reset_control *bridge; > + struct reset_control *swinit; Same comment as previous patch. > int num_memc; > u64 memc_size[PCIE_BRCM_MAX_MEMC]; > u32 hw_rev; > @@ -1633,12 +1634,27 @@ static int brcm_pcie_probe(struct platform_device *pdev) > if (IS_ERR(pcie->bridge)) > return PTR_ERR(pcie->bridge); > > + pcie->swinit = devm_reset_control_get_optional_exclusive(&pdev->dev, "swinit"); > + if (IS_ERR(pcie->swinit)) > + return PTR_ERR(pcie->swinit); > + > ret = clk_prepare_enable(pcie->clk); > if (ret) { > dev_err(&pdev->dev, "could not enable clock\n"); > return ret; > } > > + ret = reset_control_assert(pcie->swinit); > + if (ret) { > + dev_err_probe(&pdev->dev, ret, "could not assert reset 'swinit'\n"); > + goto clk_out; > + } No delay required? - Mani -- மணிவண்ணன் சதாசிவம்