Re: [PATCH v7 2/8] mtd: rawnand: qcom: cleanup qcom_nandc driver

kernel test robot
2024-07-24T20:15:41Z

Hi Md,

kernel test robot noticed the following build warnings:

[auto build test WARNING on mtd/nand/next]
[also build test WARNING on broonie-spi/for-next robh/for-next linus/master v6.10 next-20240724]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url: https://github.com/intel-lab-lkp/linux/commits/Md-Sadre-Alam/spi-dt-bindings-Introduce-qcom-spi-qpic-snand/20240724-195819
base: https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next
patch link: https://lore.kernel.org/r/20240724114225.2176448-3-quic_mdalam%40quicinc.com
patch subject: [PATCH v7 2/8] mtd: rawnand: qcom: cleanup qcom_nandc driver
config: i386-buildonly-randconfig-004-20240725 (https://download.01.org/0day-ci/archive/20240725/202407250425.0AJoHyHa-lkp@intel.com/config)
compiler: gcc-8 (Ubuntu 8.4.0-3ubuntu2) 8.4.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240725/202407250425.0AJoHyHa-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202407250425.0AJoHyHa-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/mtd/nand/raw/qcom_nandc.c:682: warning: Function parameter or struct member 'chip' not described in 'nandc_set_read_loc_first'
>> drivers/mtd/nand/raw/qcom_nandc.c:710: warning: Function parameter or struct member 'chip' not described in 'nandc_set_read_loc_last'

vim +682 drivers/mtd/nand/raw/qcom_nandc.c

669
670 /**
671 * nandc_set_read_loc_first() - to set read location first register
672 * @reg_base: location register base
673 * @cw_offset: code word offset
674 * @read_size: code word read length
675 * @is_last_read_loc: is this the last read location
676 *
677 * This function will set location register value
678 */
679 static void nandc_set_read_loc_first(struct nand_chip *chip,
680 int reg_base, int cw_offset,
681 int read_size, int is_last_read_loc)
> 682 {
683 struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
684 int val = (((cw_offset) << READ_LOCATION_OFFSET) |
685 ((read_size) << READ_LOCATION_SIZE) |
686 ((is_last_read_loc) << READ_LOCATION_LAST));
687
688 if (reg_base == NAND_READ_LOCATION_0)
689 nandc->regs->read_location0 = val;
690 else if (reg_base == NAND_READ_LOCATION_1)
691 nandc->regs->read_location1 = val;
692 else if (reg_base == NAND_READ_LOCATION_2)
693 nandc->regs->read_location2 = val;
694 else if (reg_base == NAND_READ_LOCATION_3)
695 nandc->regs->read_location3 = val;
696 }
697
698 /**
699 * nandc_set_read_loc_last - to set read location last register
700 * @reg_base: location register base
701 * @cw_offset: code word offset
702 * @read_size: code word read length
703 * @is_last_read_loc: is this the last read location
704 *
705 * This function will set location last register value
706 */
707 static void nandc_set_read_loc_last(struct nand_chip *chip,
708 int reg_base, int cw_offset,
709 int read_size, int is_last_read_loc)
> 710 {
711 struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
712
713 int val = (((cw_offset) << READ_LOCATION_OFFSET) |
714 ((read_size) << READ_LOCATION_SIZE) |
715 ((is_last_read_loc) << READ_LOCATION_LAST));
716
717 if (reg_base == NAND_READ_LOCATION_LAST_CW_0)
718 nandc->regs->read_location_last0 = val;
719 else if (reg_base == NAND_READ_LOCATION_LAST_CW_1)
720 nandc->regs->read_location_last1 = val;
721 else if (reg_base == NAND_READ_LOCATION_LAST_CW_2)
722 nandc->regs->read_location_last2 = val;
723 else if (reg_base == NAND_READ_LOCATION_LAST_CW_3)
724 nandc->regs->read_location_last3 = val;
725 }
726

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