RE: 回覆: [PATCH v1 08/10] arm64: dts: aspeed: Add initial AST27XX device tree

Kevin Chen
2024-10-07T09:26:22Z

> >>> diff --git a/arch/arm64/boot/dts/aspeed/aspeed-g7.dtsi
> >>> b/arch/arm64/boot/dts/aspeed/aspeed-g7.dtsi
> >>> new file mode 100644
> >>> index 000000000000..858ab95251e4
> >>> --- /dev/null
> >>> +++ b/arch/arm64/boot/dts/aspeed/aspeed-g7.dtsi
> >>> @@ -0,0 +1,217 @@
> >>> +// SPDX-License-Identifier: GPL-2.0-or-later #include
> >>> +<dt-bindings/clock/aspeed,ast2700-clk.h>
> >>> +#include <dt-bindings/reset/aspeed,ast2700-reset.h>
> >>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> >>> +#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
> >>> +
> >>> +/ {
> >>> + model = "Aspeed BMC";
> >>
> >> Model of what? No, drop.
> > Can I change to "model = "AST2700 EVB""
>
> Model of what? No, it does not make sense here.
Should I change to model = "Aspeed BMC SoC";

>
>
> ..
>
>
> >>> +
> >>> + uart12: serial@14c33b00 {
> >>> + compatible = "ns16550a";
> >>> + reg = <0x0 0x14c33b00 0x0 0x100>;
> >>> + reg-shift = <2>;
> >>> + reg-io-width = <4>;
> >>> + clocks = <&syscon1
> SCU1_CLK_GATE_UART12CLK>;
> >>> + no-loopback-test;
> >>> + pinctrl-names = "default";
> >>
> >> What is this?
> > BMC uart using in uart12 in soc1.
>
> No, that line. pinctrl-names do not make sense here without values.
Agree, I will remove the line of pinctrl-names in next patch.
Pinctrl property needed to be defined in the future patches.

>
> >
> >>
> >>> + };
> >>> + };
> >>> +};
> >>> +
> >
> > --
> > Best Regards,
> > Kevin. Chen
> >
>
> Why do you quote my email twice?
>
>
> ...
>
> >> + uart12: serial@14c33b00 {
> >> + compatible = "ns16550a";
> >> + reg = <0x0 0x14c33b00 0x0 0x100>;
> >> + reg-shift = <2>;
> >> + reg-io-width = <4>;
> >> + clocks = <&syscon1
> SCU1_CLK_GATE_UART12CLK>;
> >> + no-loopback-test;
> >> + pinctrl-names = "default";
> >
> > What is this?
> >
> >> + };
> >> + };
> >> +};
> >> +
> >
> > Best regards,
> > Krzysztof
> >
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