From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7467D1D8335; Thu, 1 Aug 2024 00:33:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722472422; cv=none; b=GfBNEKflDDc4tjtBBc4sDNuHXPw6qs2oAqtzUZcmvU7SqKc2lPu/huFqPIAMXbgUgIwt65I5HjcJXiDnGa3q0BjDJbFBJNPM5+zvobh3hAWzUodbci1fZ4YS2OsQa3Db9/wS7e/0+0I+Jy8NbzqfghXhd9HvTm/5crhFAoLKZ3E= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722472422; c=relaxed/simple; bh=LQvk/QRpydNifvJzK8ZzFN5wU8Ad9iuNGIGWNwqm79o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Hdu6zzPes97s0Waq5+CN9YEuhSqpcRdq4yYqFzNpgQfDMhSMiaLDQP6vTSENfplgZ9FO7qwGeIYZj1QtlGqVYTKVPckIDteD5xpl4XhVZOIQLvJv8Xe4sWjanAoWPj182BwIAF0TqHI39a98MVEn+jzkP2xX/K/OC2DAq+SZgeM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=M8Rn2TyA; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="M8Rn2TyA" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 244B3C116B1; Thu, 1 Aug 2024 00:33:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1722472422; bh=LQvk/QRpydNifvJzK8ZzFN5wU8Ad9iuNGIGWNwqm79o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=M8Rn2TyAPN9opdRatiLd8foaIijk/BRfVGGPrG3U1lrB6x7fWnW8LlQoKEulvvAng 3sQVBQPjFDmxIijc5EcWrVNP/pXt1BuUt9KMWcBYcZrPxZ5DckB5DxjnqGqrVzSDZ8 Xqm0C2c4G2LJ1aLx/xrb0klKs1HtUH9yeltQHuU/aRk7vSmu3oVeUrt7FTATuJ1ng1 RT9xCoCfQy9cyNXcVwtGNQIrAlPUVX9AXEplRoGn1ngGHnHA31pSVJudEdq5HBRs+P p49FXRaknxpIAwCjp1V3TSklMtxpzyoSvgQFNu2DqwhU5Xgb1Rxjq6BZNAPysMoHcq JNXnrCbNly3dg== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Alex Hung , Harry Wentland , Tom Chung , Daniel Wheeler , Alex Deucher , Sasha Levin , sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch, roman.li@amd.com, hamza.mahfooz@amd.com, aric.cyr@amd.com, joshua.aberback@amd.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 5.15 10/47] drm/amd/display: Check num_valid_sets before accessing reader_wm_sets[] Date: Wed, 31 Jul 2024 20:31:00 -0400 Message-ID: <20240801003256.3937416-10-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240801003256.3937416-1-sashal@kernel.org> References: <20240801003256.3937416-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 5.15.164 Content-Transfer-Encoding: 8bit From: Alex Hung [ Upstream commit b38a4815f79b87efb196cd5121579fc51e29a7fb ] [WHY & HOW] num_valid_sets needs to be checked to avoid a negative index when accessing reader_wm_sets[num_valid_sets - 1]. This fixes an OVERRUN issue reported by Coverity. Reviewed-by: Harry Wentland Acked-by: Tom Chung Signed-off-by: Alex Hung Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c index 6185f9475fa22..afce8f3bc67a2 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c @@ -489,7 +489,8 @@ static void build_watermark_ranges(struct clk_bw_params *bw_params, struct pp_sm ranges->reader_wm_sets[num_valid_sets].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; /* Modify previous watermark range to cover up to max */ - ranges->reader_wm_sets[num_valid_sets - 1].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; + if (num_valid_sets > 0) + ranges->reader_wm_sets[num_valid_sets - 1].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; } num_valid_sets++; } -- 2.43.0