From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C2641C0A74; Thu, 1 Aug 2024 00:38:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722472686; cv=none; b=t0wL/FUkhcBeG6f0nN+Nk2og0srSflVsRjAbFQYl4UXxNvXa70C0C9jTZobXcTf2VK1UUi2aYFK2abZR6z7M9NIdN4z5g816rpm3Q6Dhdiw/EkS5IVdw7xUDK3hkQN3U6W57u4TeB9Uz/OD/hZrAN1tJCyxelQ4EgA+WtMv0ERY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722472686; c=relaxed/simple; bh=+T3ciHa949uEkErt/yXJwrqiGPNj6zzhv94e/0Z2npo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=QdiKupttaXuKyx+Ap9h0PbWK5zC9lyjz+RCrF7/LwOn7TQHzyGdt5dIEPz6x2+fvQ/ou1fvVF8Mfe7DXzw8rFQ2WkIrWZds71POCjUyNZ5y/iLj/ZoTHgq3xNh0fTxf5m2qfUqW1QB/zHH0eHhAC0KTAR5GuESO1uLLFVnv3DRQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=iJ0F9t9z; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="iJ0F9t9z" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B99A1C32786; Thu, 1 Aug 2024 00:38:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1722472686; bh=+T3ciHa949uEkErt/yXJwrqiGPNj6zzhv94e/0Z2npo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iJ0F9t9zj5tQ8XfayLsJKjsIbAK0TVBLUf4X8QxvbKd/foKT3IiKA9JVHpe271mxp 4n2tOwZyFwuD8hlQu6Y+cTjobQ9o8GpNZ55ijO/0SRx91Df43wRa2o27RzEJ/rHC2L RW2VitbHiDQmIAUbvDJiXFpW743VVslbDRJvf8wHmH5RGNmbHMhQX6atxA9AjusgCT Uv7YFZfE98NX7z4bLtRl3PXbRaUz+XSHG0ijg9pwm2BNZOu2WDehFh7xv1Z80gqNv4 T+Kc5uKkDmW7FiMy8wAo0sWtM0OpkMOTGNBF9Vy8Fbi9Ulq562RxLIQObhsVZd6jaL GukCcUMfif+YQ== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Aleksandr Mishin , Bjorn Helgaas , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Sasha Levin , jonnyc@amazon.com, lpieralisi@kernel.org, kw@linux.com, linux-pci@vger.kernel.org Subject: [PATCH AUTOSEL 5.10 19/38] PCI: al: Check IORESOURCE_BUS existence during probe Date: Wed, 31 Jul 2024 20:35:25 -0400 Message-ID: <20240801003643.3938534-19-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240801003643.3938534-1-sashal@kernel.org> References: <20240801003643.3938534-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 5.10.223 Content-Transfer-Encoding: 8bit From: Aleksandr Mishin [ Upstream commit a9927c2cac6e9831361e43a14d91277818154e6a ] If IORESOURCE_BUS is not provided in Device Tree it will be fabricated in of_pci_parse_bus_range(), so NULL pointer dereference should not happen here. But that's hard to verify, so check for NULL anyway. Found by Linux Verification Center (linuxtesting.org) with SVACE. Link: https://lore.kernel.org/linux-pci/20240503125705.46055-1-amishin@t-argos.ru Suggested-by: Bjorn Helgaas Signed-off-by: Aleksandr Mishin Signed-off-by: Krzysztof Wilczyński [bhelgaas: commit log] Signed-off-by: Bjorn Helgaas Signed-off-by: Sasha Levin --- drivers/pci/controller/dwc/pcie-al.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-al.c b/drivers/pci/controller/dwc/pcie-al.c index f973fbca90cf7..ac772fb11aa73 100644 --- a/drivers/pci/controller/dwc/pcie-al.c +++ b/drivers/pci/controller/dwc/pcie-al.c @@ -250,18 +250,24 @@ static struct pci_ops al_child_pci_ops = { .write = pci_generic_config_write, }; -static void al_pcie_config_prepare(struct al_pcie *pcie) +static int al_pcie_config_prepare(struct al_pcie *pcie) { struct al_pcie_target_bus_cfg *target_bus_cfg; struct pcie_port *pp = &pcie->pci->pp; unsigned int ecam_bus_mask; + struct resource_entry *ft; u32 cfg_control_offset; + struct resource *bus; u8 subordinate_bus; u8 secondary_bus; u32 cfg_control; u32 reg; - struct resource *bus = resource_list_first_type(&pp->bridge->windows, IORESOURCE_BUS)->res; + ft = resource_list_first_type(&pp->bridge->windows, IORESOURCE_BUS); + if (!ft) + return -ENODEV; + + bus = ft->res; target_bus_cfg = &pcie->target_bus_cfg; ecam_bus_mask = (pcie->ecam_size >> 20) - 1; @@ -295,6 +301,8 @@ static void al_pcie_config_prepare(struct al_pcie *pcie) FIELD_PREP(CFG_CONTROL_SEC_BUS_MASK, secondary_bus); al_pcie_controller_writel(pcie, cfg_control_offset, reg); + + return 0; } static int al_pcie_host_init(struct pcie_port *pp) @@ -313,7 +321,9 @@ static int al_pcie_host_init(struct pcie_port *pp) if (rc) return rc; - al_pcie_config_prepare(pcie); + rc = al_pcie_config_prepare(pcie); + if (rc) + return rc; return 0; } -- 2.43.0