From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B8CDB14C58C; Thu, 1 Aug 2024 00:37:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722472641; cv=none; b=Af//LE+6YnhtkUHS745zlgW/Yc10+hOOJ0R/6tW/PG64k2kA7lTflje7BXd+EX5NWR4qApW8pKhXCc2S1oUHQdl78xZEOSg4oMnuEab7HTaXWdTwSxH9p9+I8h3UhKrH7Svee3xRmTLMmj3cV/LXZzD2rnBRCr+h/NRFV6SLzgI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722472641; c=relaxed/simple; bh=sjWJYq61EFoAD/TIEm0j2gmZIsXDpnhzZ6p/pPAOqt4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=D5SRTzEpbSHLddJiD7UWWKVcaJokWaptPJ+ueC6WTcsvBeUyF8CWDPBJVw1ztLOwq/J3lacNqEDXhTeTPiOORBoWn0pkigb0YJOP7Fo7tdLZKq5S0a9kuVOWSD83mvZDI2R75jw4hsunBInD9lpBvdzTBIRseA9ekX59qZJUnAc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZkdiGX/r; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZkdiGX/r" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A73C8C4AF0E; Thu, 1 Aug 2024 00:37:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1722472641; bh=sjWJYq61EFoAD/TIEm0j2gmZIsXDpnhzZ6p/pPAOqt4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZkdiGX/rbY17JkmvsXNPl+XUz7W+WT4hxWhBmLiR9HF2x4Z7n5ehW0L5LgjyDH4vy wrXtxsQNUqBSpHhVJeFuLkcXUDdvgvRyYoJbkneL/MaD7UBc0SaUC8kZxO7wJeeX/8 O93FmiUEg4KdYHN3B5hr0c2msQsnSaJhhzxyz22GML49kBPG+coTotzCQzayViRawq w2Ds+E3pdJpnirXYY7E7uuZEiJ2Tm845jBDhmcFd9pRtDvUMHquLuRzcCOSmDgBOrn p3zaLUA/CrebDyqa0KJguBxJL9v/cJlTGbA3tiwZQgRzZiw2zqOB/T1MXmDiGtcBpD fsE0tUvgZ3yrw== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Alex Hung , Harry Wentland , Tom Chung , Daniel Wheeler , Alex Deucher , Sasha Levin , sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch, hamza.mahfooz@amd.com, roman.li@amd.com, joshua.aberback@amd.com, aric.cyr@amd.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 5.10 08/38] drm/amd/display: Check num_valid_sets before accessing reader_wm_sets[] Date: Wed, 31 Jul 2024 20:35:14 -0400 Message-ID: <20240801003643.3938534-8-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240801003643.3938534-1-sashal@kernel.org> References: <20240801003643.3938534-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 5.10.223 Content-Transfer-Encoding: 8bit From: Alex Hung [ Upstream commit b38a4815f79b87efb196cd5121579fc51e29a7fb ] [WHY & HOW] num_valid_sets needs to be checked to avoid a negative index when accessing reader_wm_sets[num_valid_sets - 1]. This fixes an OVERRUN issue reported by Coverity. Reviewed-by: Harry Wentland Acked-by: Tom Chung Signed-off-by: Alex Hung Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c index 0eba391e597fd..40d03f8cde2cf 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c @@ -455,7 +455,8 @@ static void build_watermark_ranges(struct clk_bw_params *bw_params, struct pp_sm ranges->reader_wm_sets[num_valid_sets].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; /* Modify previous watermark range to cover up to max */ - ranges->reader_wm_sets[num_valid_sets - 1].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; + if (num_valid_sets > 0) + ranges->reader_wm_sets[num_valid_sets - 1].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; } num_valid_sets++; } -- 2.43.0