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* [PATCH v5] x86/mtrr: Check if fixed MTRRs exist before saving them
@ 2024-08-08  0:02 Andi Kleen
  2024-08-08 15:13 ` [tip: x86/urgent] " tip-bot2 for Andi Kleen
  0 siblings, 1 reply; 2+ messages in thread
From: Andi Kleen @ 2024-08-08  0:02 UTC (permalink / raw)
  To: tglx; +Cc: linux-kernel, x86, Andi Kleen

MTRRs have an obsolete fixed variant for fine grained caching control
of the 640K-1MB region that uses separate MSRs. This fixed variant has
a separate capability bit in the MTRR capability MSR, however all x86
CPUs which have MTRR generally had this separate bit set.

The code to save MTRRs forgets to check the capability bit before
accessing the fixed MTRR MSRs.  This results in a #GP on a system that
does not support the fixed MTRR capability. The #GP is harmless because
the RDMSR fault is handled and harmless, but results in a WARN_ON printout
that looks scary to the user.

Found by testing Linux on a setup without fixed MTRRs.

Fixes: 2b1f6278d77c ("[PATCH] x86: Save the MTRRs of the BSP before booting an AP")
Signed-off-by: Andi Kleen <ak@linux.intel.com>

---

v2: Add Fixes tag and expand description.
v3: Expand description
v4: Expand description
v5: Change description
---
 arch/x86/kernel/cpu/mtrr/mtrr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.c b/arch/x86/kernel/cpu/mtrr/mtrr.c
index 767bf1c71aad..2a2fc14955cd 100644
--- a/arch/x86/kernel/cpu/mtrr/mtrr.c
+++ b/arch/x86/kernel/cpu/mtrr/mtrr.c
@@ -609,7 +609,7 @@ void mtrr_save_state(void)
 {
 	int first_cpu;
 
-	if (!mtrr_enabled())
+	if (!mtrr_enabled() || !mtrr_state.have_fixed)
 		return;
 
 	first_cpu = cpumask_first(cpu_online_mask);
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* [tip: x86/urgent] x86/mtrr: Check if fixed MTRRs exist before saving them
  2024-08-08  0:02 [PATCH v5] x86/mtrr: Check if fixed MTRRs exist before saving them Andi Kleen
@ 2024-08-08 15:13 ` tip-bot2 for Andi Kleen
  0 siblings, 0 replies; 2+ messages in thread
From: tip-bot2 for Andi Kleen @ 2024-08-08 15:13 UTC (permalink / raw)
  To: linux-tip-commits; +Cc: Andi Kleen, Thomas Gleixner, stable, x86, linux-kernel

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID:     919f18f961c03d6694aa726c514184f2311a4614
Gitweb:        https://git.kernel.org/tip/919f18f961c03d6694aa726c514184f2311a4614
Author:        Andi Kleen <ak@linux.intel.com>
AuthorDate:    Wed, 07 Aug 2024 17:02:44 -07:00
Committer:     Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Thu, 08 Aug 2024 17:03:12 +02:00

x86/mtrr: Check if fixed MTRRs exist before saving them

MTRRs have an obsolete fixed variant for fine grained caching control
of the 640K-1MB region that uses separate MSRs. This fixed variant has
a separate capability bit in the MTRR capability MSR.

So far all x86 CPUs which support MTRR have this separate bit set, so it
went unnoticed that mtrr_save_state() does not check the capability bit
before accessing the fixed MTRR MSRs.

Though on a CPU that does not support the fixed MTRR capability this
results in a #GP.  The #GP itself is harmless because the RDMSR fault is
handled gracefully, but results in a WARN_ON().

Add the missing capability check to prevent this.

Fixes: 2b1f6278d77c ("[PATCH] x86: Save the MTRRs of the BSP before booting an AP")
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/all/20240808000244.946864-1-ak@linux.intel.com
---
 arch/x86/kernel/cpu/mtrr/mtrr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.c b/arch/x86/kernel/cpu/mtrr/mtrr.c
index 767bf1c..2a2fc14 100644
--- a/arch/x86/kernel/cpu/mtrr/mtrr.c
+++ b/arch/x86/kernel/cpu/mtrr/mtrr.c
@@ -609,7 +609,7 @@ void mtrr_save_state(void)
 {
 	int first_cpu;
 
-	if (!mtrr_enabled())
+	if (!mtrr_enabled() || !mtrr_state.have_fixed)
 		return;
 
 	first_cpu = cpumask_first(cpu_online_mask);

^ permalink raw reply related	[flat|nested] 2+ messages in thread

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