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From: Dapeng Mi <dapeng1.mi@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Namhyung Kim <namhyung@kernel.org>,
	Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Kan Liang <kan.liang@linux.intel.com>
Cc: linux-kernel@vger.kernel.org, Andi Kleen <ak@linux.intel.com>,
	Zhenyu Wang <zhenyuw@linux.intel.com>,
	Yongwei Ma <yongwei.ma@intel.com>,
	Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
	Dapeng Mi <dapeng1.mi@intel.com>,
	Dapeng Mi <dapeng1.mi@linux.intel.com>
Subject: [PATCH 1/4] perf/x86: Refine hybrid_pmu_type defination
Date: Thu,  8 Aug 2024 14:02:07 +0000	[thread overview]
Message-ID: <20240808140210.1666783-2-dapeng1.mi@linux.intel.com> (raw)
In-Reply-To: <20240808140210.1666783-1-dapeng1.mi@linux.intel.com>

Use macros instead of magic number to define hybrid_pmu_type and remove
X86_HYBRID_NUM_PMUS since it's never used.

Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Tested-by: Yongwei Ma <yongwei.ma@intel.com>
---
 arch/x86/events/perf_event.h | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index ac1182141bf6..5d1677844e04 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -674,19 +674,16 @@ enum hybrid_cpu_type {
 	HYBRID_INTEL_CORE	= 0x40,
 };
 
+#define X86_HYBRID_PMU_ATOM_IDX		0
+#define X86_HYBRID_PMU_CORE_IDX		1
 enum hybrid_pmu_type {
 	not_hybrid,
-	hybrid_small		= BIT(0),
-	hybrid_big		= BIT(1),
+	hybrid_small		= BIT(X86_HYBRID_PMU_ATOM_IDX),
+	hybrid_big		= BIT(X86_HYBRID_PMU_CORE_IDX),
 
 	hybrid_big_small	= hybrid_big | hybrid_small, /* only used for matching */
 };
 
-#define X86_HYBRID_PMU_ATOM_IDX		0
-#define X86_HYBRID_PMU_CORE_IDX		1
-
-#define X86_HYBRID_NUM_PMUS		2
-
 struct x86_hybrid_pmu {
 	struct pmu			pmu;
 	const char			*name;
-- 
2.40.1


  reply	other threads:[~2024-08-08  7:47 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-08 14:02 [PATCH 0/4] Enable PMU for ArrowLake-H Dapeng Mi
2024-08-08 14:02 ` Dapeng Mi [this message]
2024-08-10 21:35   ` [PATCH 1/4] perf/x86: Refine hybrid_pmu_type defination Peter Zijlstra
2024-08-12  2:44     ` Mi, Dapeng
2024-08-08 14:02 ` [PATCH 2/4] x86/cpu/intel: Define helper to get CPU core native ID Dapeng Mi
2024-08-08 14:02 ` [PATCH 3/4] perf/x86/intel: Support hybrid PMU with multiple atom uarchs Dapeng Mi
2024-08-10 21:55   ` Peter Zijlstra
2024-08-12  3:18     ` Mi, Dapeng
2024-08-12  3:27       ` Zhenyu Wang
2024-08-16  3:54         ` Mi, Dapeng
2024-08-08 14:02 ` [PATCH 4/4] perf/x86/intel: Add PMU support for ArrowLake-H Dapeng Mi
2024-08-08 16:07 ` [PATCH 0/4] Enable PMU " Liang, Kan

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