Re: [PATCH v2 02/36] soc: fsl: cpm1: qmc: Enable TRNSYNC only when needed

Christophe Leroy
2024-08-23T08:04:03Z

Le 08/08/2024 à 09:10, Herve Codina a écrit :
> The TRNSYNC feature is enabled whatever the number of time-slots used.
> The feature is needed only when more than one time-slot is used.
>
> Improve the driver enabling TRNSYNC only when it is needed.
>
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>

Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>

> ---
> drivers/soc/fsl/qe/qmc.c | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soc/fsl/qe/qmc.c b/drivers/soc/fsl/qe/qmc.c
> index bacabf731dcb..916395745850 100644
> --- a/drivers/soc/fsl/qe/qmc.c
> +++ b/drivers/soc/fsl/qe/qmc.c
> @@ -889,6 +889,7 @@ EXPORT_SYMBOL(qmc_chan_stop);
> static int qmc_setup_chan_trnsync(struct qmc *qmc, struct qmc_chan *chan)
> {
> struct tsa_serial_info info;
> + unsigned int w_rx, w_tx;
> u16 first_rx, last_tx;
> u16 trnsync;
> int ret;
> @@ -898,6 +899,14 @@ static int qmc_setup_chan_trnsync(struct qmc *qmc, struct qmc_chan *chan)
> if (ret)
> return ret;
>
> + w_rx = hweight64(chan->rx_ts_mask);
> + w_tx = hweight64(chan->tx_ts_mask);
> + if (w_rx <= 1 && w_tx <= 1) {
> + dev_dbg(qmc->dev, "only one or zero ts -> disable trnsync\n");
> + qmc_clrbits16(chan->s_param + QMC_SPE_CHAMR, QMC_SPE_CHAMR_TRANSP_SYNC);
> + return 0;
> + }
> +
> /* Find the first Rx TS allocated to the channel */
> first_rx = chan->rx_ts_mask ? __ffs64(chan->rx_ts_mask) + 1 : 0;
>
> @@ -911,6 +920,7 @@ static int qmc_setup_chan_trnsync(struct qmc *qmc, struct qmc_chan *chan)
> trnsync |= QMC_SPE_TRNSYNC_TX((last_tx % info.nb_tx_ts) * 2);
>
> qmc_write16(chan->s_param + QMC_SPE_TRNSYNC, trnsync);
> + qmc_setbits16(chan->s_param + QMC_SPE_CHAMR, QMC_SPE_CHAMR_TRANSP_SYNC);
>
> dev_dbg(qmc->dev, "chan %u: trnsync=0x%04x, rx %u/%u 0x%llx, tx %u/%u 0x%llx\n",
> chan->id, trnsync,
> @@ -1378,7 +1388,7 @@ static int qmc_setup_chan(struct qmc *qmc, struct qmc_chan *chan)
> if (chan->mode == QMC_TRANSPARENT) {
> qmc_write32(chan->s_param + QMC_SPE_ZDSTATE, 0x18000080);
> qmc_write16(chan->s_param + QMC_SPE_TMRBLR, 60);
> - val = QMC_SPE_CHAMR_MODE_TRANSP | QMC_SPE_CHAMR_TRANSP_SYNC;
> + val = QMC_SPE_CHAMR_MODE_TRANSP;
> if (chan->is_reverse_data)
> val |= QMC_SPE_CHAMR_TRANSP_RD;
> qmc_write16(chan->s_param + QMC_SPE_CHAMR, val);