From: Greg KH <gregkh@linuxfoundation.org>
To: levymitchell0@gmail.com
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
Kan Liang <kan.liang@linux.intel.com>,
"Peter Zijlstra (Intel)" <peterz@infradead.org>,
stable@vger.kernel.org, Borislav Petkov <bp@suse.de>,
linux-kernel@vger.kernel.org, Dave Hansen <dave.hansen@intel.com>
Subject: Re: [PATCH v3] x86/fpu: Avoid writing LBR bit to IA32_XSS unless supported
Date: Tue, 13 Aug 2024 07:14:04 +0200 [thread overview]
Message-ID: <2024081339-duchess-demeanor-171a@gregkh> (raw)
In-Reply-To: <20240812-xsave-lbr-fix-v3-1-95bac1bf62f4@gmail.com>
On Mon, Aug 12, 2024 at 01:44:12PM -0700, Mitchell Levy via B4 Relay wrote:
> Fixes: f0dccc9da4c0 ("x86/fpu/xstate: Support dynamic supervisor feature for LBR")
> Cc: stable@vger.kernel.org
>
> Suggested-by: Thomas Gleixner <tglx@linutronix.de>
>
> Signed-off-by: Mitchell Levy <levymitchell0@gmail.com>
Please remove the blank lines here.
thanks,
greg k-h
next prev parent reply other threads:[~2024-08-13 5:14 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-12 20:44 [PATCH v3] x86/fpu: Avoid writing LBR bit to IA32_XSS unless supported Mitchell Levy via B4 Relay
2024-08-13 5:14 ` Greg KH [this message]
2024-08-14 17:46 ` [tip: x86/urgent] " tip-bot2 for Mitchell Levy
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