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From: "Miquel Sabaté Solà" <mikisabate@gmail.com>
To: paul.walmsley@sifive.com
Cc: palmer@dabbelt.com, aou@eecs.berkeley.edu,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	"Miquel Sabaté Solà" <mikisabate@gmail.com>
Subject: [PATCH] riscv: hwprobe: export Zicntr and Zihpm extensions
Date: Sat, 17 Aug 2024 09:56:29 +0200	[thread overview]
Message-ID: <20240817075629.262318-1-mikisabate@gmail.com> (raw)

Export Zicntr and Zihpm ISA extensions through the hwprobe syscall.

Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com>
---
 Documentation/arch/riscv/hwprobe.rst  | 6 ++++++
 arch/riscv/include/uapi/asm/hwprobe.h | 2 ++
 arch/riscv/kernel/sys_hwprobe.c       | 2 ++
 3 files changed, 10 insertions(+)

diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst
index 3db60a0911df..5bb69c985cce 100644
--- a/Documentation/arch/riscv/hwprobe.rst
+++ b/Documentation/arch/riscv/hwprobe.rst
@@ -188,10 +188,16 @@ The following keys are defined:
        manual starting from commit 95cf1f9 ("Add changes requested by Ved
        during signoff")
 
+  * :c:macro:`RISCV_HWPROBE_EXT_ZICNTR`: The Zicntr extension version 2.0
+       is supported as defined in the RISC-V ISA manual.
+
   * :c:macro:`RISCV_HWPROBE_EXT_ZIHINTPAUSE`: The Zihintpause extension is
        supported as defined in the RISC-V ISA manual starting from commit
        d8ab5c78c207 ("Zihintpause is ratified").
 
+  * :c:macro:`RISCV_HWPROBE_EXT_ZIHPM`: The Zihpm extension version 2.0
+       is supported as defined in the RISC-V ISA manual.
+
   * :c:macro:`RISCV_HWPROBE_EXT_ZVE32X`: The Vector sub-extension Zve32x is
     supported, as defined by version 1.0 of the RISC-V Vector extension manual.
 
diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h
index b706c8e47b02..098a815b3fd4 100644
--- a/arch/riscv/include/uapi/asm/hwprobe.h
+++ b/arch/riscv/include/uapi/asm/hwprobe.h
@@ -72,6 +72,8 @@ struct riscv_hwprobe {
 #define		RISCV_HWPROBE_EXT_ZCF		(1ULL << 46)
 #define		RISCV_HWPROBE_EXT_ZCMOP		(1ULL << 47)
 #define		RISCV_HWPROBE_EXT_ZAWRS		(1ULL << 48)
+#define		RISCV_HWPROBE_EXT_ZICNTR	(1ULL << 49)
+#define		RISCV_HWPROBE_EXT_ZIHPM		(1ULL << 50)
 #define RISCV_HWPROBE_KEY_CPUPERF_0	5
 #define		RISCV_HWPROBE_MISALIGNED_UNKNOWN	(0 << 0)
 #define		RISCV_HWPROBE_MISALIGNED_EMULATED	(1 << 0)
diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c
index 8d1b5c35d2a7..30aede1c90ff 100644
--- a/arch/riscv/kernel/sys_hwprobe.c
+++ b/arch/riscv/kernel/sys_hwprobe.c
@@ -118,6 +118,8 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair,
 		EXT_KEY(ZKSH);
 		EXT_KEY(ZKT);
 		EXT_KEY(ZTSO);
+		EXT_KEY(ZICNTR);
+		EXT_KEY(ZIHPM);
 
 		/*
 		 * All the following extensions must depend on the kernel
-- 
2.46.0


             reply	other threads:[~2024-08-17  7:57 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-17  7:56 Miquel Sabaté Solà [this message]
2024-08-19 17:29 ` [PATCH] riscv: hwprobe: export Zicntr and Zihpm extensions Jesse Taube
2024-08-19 17:34   ` Conor Dooley
2024-08-20  4:17     ` Miquel Sabaté Solà
2024-08-20  4:47 ` [PATCH v2] " Miquel Sabaté Solà
2024-09-05  7:40   ` Miquel Sabaté Solà
2024-09-09 11:11     ` Conor Dooley
2024-09-09 11:38       ` Miquel Sabaté Solà
2024-09-09 11:48         ` Conor Dooley

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