From: Mario Limonciello <superm1@kernel.org>
To: Bjorn Helgaas <bhelgaas@google.com>,
Mathias Nyman <mathias.nyman@intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: "open list : PCI SUBSYSTEM" <linux-pci@vger.kernel.org>,
"open list" <linux-kernel@vger.kernel.org>,
"open list : USB XHCI DRIVER" <linux-usb@vger.kernel.org>,
"Daniel Drake" <drake@endlessos.org>, "Gary Li" <Gary.Li@amd.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Mario Limonciello" <mario.limonciello@amd.com>
Subject: [PATCH v4 3/5] PCI: Verify functions currently in D3cold have entered D0
Date: Thu, 22 Aug 2024 23:25:06 -0500 [thread overview]
Message-ID: <20240823042508.1057791-5-superm1@kernel.org> (raw)
In-Reply-To: <20240823042508.1057791-1-superm1@kernel.org>
From: Mario Limonciello <mario.limonciello@amd.com>
It is reported that USB4 routers and downstream devices may behave
incorrectly if a dock cable is plugged in at approximately the time that
the autosuspend_delay is configured. In this situation the device has
attempted to enter D3cold, but didn't finish D3cold entry when the PCI
core tried to transition it back to D0.
Empirically measuring this situation an "aborted" D3cold exit takes
~60ms and a "normal" D3cold exit takes ~6ms.
The PCI-PM 1.2 spec specifies that the restore time for functions
in D3cold is either 'Full context restore or boot latency'.
As PCIe r6.0 sec 5.8 specifies that the device will have gone
through a conventional reset, it may take some time for the
device to be ready.
Wait up to 1 sec as specified in PCIe r6.0 sec 6.6.1 for a device
in D3cold to return to D0.
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
drivers/pci/pci.c | 11 +++++++++++
drivers/pci/pci.h | 1 +
2 files changed, 12 insertions(+)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index b7717155e2fd0..7e861b6923d0a 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1425,6 +1425,17 @@ int pci_power_up(struct pci_dev *dev)
else if (state == PCI_D2)
udelay(PCI_PM_D2_DELAY);
+ /*
+ * D3cold -> D0 will have gone through a conventional reset and may need
+ * time to be ready.
+ */
+ if (dev->current_state == PCI_D3cold) {
+ int ret;
+
+ ret = pci_dev_wait(dev, PCI_DEV_WAIT_D3COLD_D0, PCI_RESET_WAIT);
+ if (ret)
+ return ret;
+ }
end:
dev->current_state = PCI_D0;
if (need_restore)
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 477257e843952..a675f5d55f298 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -11,6 +11,7 @@ enum pci_reset_type {
PCI_DEV_WAIT_BUS_RESET,
PCI_DEV_WAIT_RESUME,
PCI_DEV_WAIT_DPC,
+ PCI_DEV_WAIT_D3COLD_D0,
};
/* Number of possible devfns: 0.0 to 1f.7 inclusive */
--
2.43.0
next prev parent reply other threads:[~2024-08-23 4:25 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-23 4:25 [PATCH v4 0/5] Verify devices transition from D3cold to D0 Mario Limonciello
2024-08-23 4:25 ` [PATCH v4 1/5] PCI: Use an enum for reset type in pci_dev_wait() Mario Limonciello
2024-08-23 11:56 ` Ilpo Järvinen
2024-08-23 4:25 ` [PATCH] x86/tsc: Use rdtsc_ordered() when RDTSCP or LFENCE_RDTSC are supported Mario Limonciello
2024-08-23 4:29 ` Mario Limonciello
2024-08-25 12:22 ` Thomas Gleixner
2024-08-25 12:37 ` Mario Limonciello
2024-08-23 4:25 ` [PATCH v4 2/5] PCI: Check PCI_PM_CTRL instead of PCI_COMMAND in pci_dev_wait() Mario Limonciello
2024-08-23 12:13 ` Ilpo Järvinen
2024-08-23 4:25 ` Mario Limonciello [this message]
2024-08-23 12:07 ` [PATCH v4 3/5] PCI: Verify functions currently in D3cold have entered D0 Ilpo Järvinen
2024-08-23 4:25 ` [PATCH v4 4/5] PCI: Allow Ryzen XHCI controllers into D3cold and drop delays Mario Limonciello
2024-08-24 1:55 ` Greg Kroah-Hartman
2024-08-23 4:25 ` [PATCH v4 5/5] PCI: Drop Radeon quirk for Macbook Pro 8.2 Mario Limonciello
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