[PATCH v5 0/2] Add support for two-plane serial NAND flash

[PATCH v5 0/2] Add support for two-plane serial NAND flash

[Cheng Ming Lin]

From: Cheng Ming Lin <chengminglin@mxic.com.tw>

Add support for Macronix serial NAND flash with a two-plane structure.

Insert the Plane Select bit during the read_from_cache and the
write_to_cache operation.

v5:
  Update the commit titles

v4:
  Separate the core changes and Macronix changes

v3:
  Add flags for the Plane Select bit
  Remove fixups and corresponding function

v2:
  Squash patches 1 and 3 and come before patch 2

Cheng Ming Lin (2):
  mtd: spinand: Add support for setting plane select bits
  mtd: spinand: macronix: Flag parts needing explicit plane select

 drivers/mtd/nand/spi/core.c     |  6 ++++++
 drivers/mtd/nand/spi/macronix.c | 24 +++++++++++++++++-------
 include/linux/mtd/spinand.h     |  2 ++
 3 files changed, 25 insertions(+), 7 deletions(-)

-- 
2.25.1

[PATCH v5 1/2] mtd: spinand: Add support for setting plane select bits

[Cheng Ming Lin]

From: Cheng Ming Lin <chengminglin@mxic.com.tw>

Add two flags for inserting the Plane Select bit into the column
address during the write_to_cache and the read_from_cache operation.

Add the SPINAND_HAS_PP_PLANE_SELECT_BIT flag for serial NAND flash
that require inserting the Plane Select bit into the column address
during the write_to_cache operation.

Add the SPINAND_HAS_READ_PLANE_SELECT_BIT flag for serial NAND flash
that require inserting the Plane Select bit into the column address
during the read_from_cache operation.

Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
---
 drivers/mtd/nand/spi/core.c | 6 ++++++
 include/linux/mtd/spinand.h | 2 ++
 2 files changed, 8 insertions(+)

diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index e0b6715e5dfe..e7b592cdbb4c 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -386,6 +386,9 @@ static int spinand_read_from_cache_op(struct spinand_device *spinand,
 	else
 		rdesc = spinand->dirmaps[req->pos.plane].rdesc_ecc;
 
+	if (spinand->flags & SPINAND_HAS_READ_PLANE_SELECT_BIT)
+		column |= req->pos.plane << fls(nanddev_page_size(nand));
+
 	while (nbytes) {
 		ret = spi_mem_dirmap_read(rdesc, column, nbytes, buf);
 		if (ret < 0)
@@ -460,6 +463,9 @@ static int spinand_write_to_cache_op(struct spinand_device *spinand,
 	else
 		wdesc = spinand->dirmaps[req->pos.plane].wdesc_ecc;
 
+	if (spinand->flags & SPINAND_HAS_PROG_PLANE_SELECT_BIT)
+		column |= req->pos.plane << fls(nanddev_page_size(nand));
+
 	while (nbytes) {
 		ret = spi_mem_dirmap_write(wdesc, column, nbytes, buf);
 		if (ret < 0)
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 5c19ead60499..0e0df620da53 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -312,6 +312,8 @@ struct spinand_ecc_info {
 
 #define SPINAND_HAS_QE_BIT		BIT(0)
 #define SPINAND_HAS_CR_FEAT_BIT		BIT(1)
+#define SPINAND_HAS_PROG_PLANE_SELECT_BIT		BIT(2)
+#define SPINAND_HAS_READ_PLANE_SELECT_BIT		BIT(3)
 
 /**
  * struct spinand_ondie_ecc_conf - private SPI-NAND on-die ECC engine structure
-- 
2.25.1

[PATCH v5 2/2] mtd: spinand: macronix: Flag parts needing explicit plane select

[Cheng Ming Lin]

From: Cheng Ming Lin <chengminglin@mxic.com.tw>

Macronix serial NAND flash with a two-plane structure requires
insertion of the Plane Select bit into the column address during
the write_to_cache operation.

Additionally, for MX35{U,F}2G14AC and MX35LF2GE4AB, insertion of
the Plane Select bit into the column address is required during
the read_from_cache operation.

Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
---
 drivers/mtd/nand/spi/macronix.c | 24 +++++++++++++++++-------
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index 3f9e9c572854..9c93dfcb955d 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -118,7 +118,9 @@ static const struct spinand_info macronix_spinand_table[] = {
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
-		     SPINAND_HAS_QE_BIT,
+		     SPINAND_HAS_QE_BIT |
+		     SPINAND_HAS_PROG_PLANE_SELECT_BIT |
+		     SPINAND_HAS_READ_PLANE_SELECT_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
 	SPINAND_INFO("MX35LF2GE4AD",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x26, 0x03),
@@ -156,7 +158,8 @@ static const struct spinand_info macronix_spinand_table[] = {
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
-		     SPINAND_HAS_QE_BIT,
+		     SPINAND_HAS_QE_BIT |
+		     SPINAND_HAS_PROG_PLANE_SELECT_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
 	SPINAND_INFO("MX35LF2G24AD-Z4I8",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x64, 0x03),
@@ -174,7 +177,8 @@ static const struct spinand_info macronix_spinand_table[] = {
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
-		     SPINAND_HAS_QE_BIT,
+		     SPINAND_HAS_QE_BIT |
+		     SPINAND_HAS_PROG_PLANE_SELECT_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
 	SPINAND_INFO("MX35LF4G24AD-Z4I8",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x75, 0x03),
@@ -213,7 +217,9 @@ static const struct spinand_info macronix_spinand_table[] = {
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
-		     SPINAND_HAS_QE_BIT,
+		     SPINAND_HAS_QE_BIT |
+		     SPINAND_HAS_PROG_PLANE_SELECT_BIT |
+		     SPINAND_HAS_READ_PLANE_SELECT_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
 				     mx35lf1ge4ab_ecc_get_status)),
 	SPINAND_INFO("MX35UF4G24AD",
@@ -223,7 +229,8 @@ static const struct spinand_info macronix_spinand_table[] = {
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
-		     SPINAND_HAS_QE_BIT,
+		     SPINAND_HAS_QE_BIT |
+		     SPINAND_HAS_PROG_PLANE_SELECT_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
 				     mx35lf1ge4ab_ecc_get_status)),
 	SPINAND_INFO("MX35UF4G24AD-Z4I8",
@@ -253,7 +260,9 @@ static const struct spinand_info macronix_spinand_table[] = {
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
-		     SPINAND_HAS_QE_BIT,
+		     SPINAND_HAS_QE_BIT |
+		     SPINAND_HAS_PROG_PLANE_SELECT_BIT |
+		     SPINAND_HAS_READ_PLANE_SELECT_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
 				     mx35lf1ge4ab_ecc_get_status)),
 	SPINAND_INFO("MX35UF2G24AD",
@@ -263,7 +272,8 @@ static const struct spinand_info macronix_spinand_table[] = {
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 					      &write_cache_variants,
 					      &update_cache_variants),
-		     SPINAND_HAS_QE_BIT,
+		     SPINAND_HAS_QE_BIT |
+		     SPINAND_HAS_PROG_PLANE_SELECT_BIT,
 		     SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
 				     mx35lf1ge4ab_ecc_get_status)),
 	SPINAND_INFO("MX35UF2G24AD-Z4I8",
-- 
2.25.1

Re: [PATCH v5 1/2] mtd: spinand: Add support for setting plane select bits

[Miquel Raynal]

Hi ChengMing,

linchengming884@gmail.com wrote on Fri, 30 Aug 2024 18:03:09 +0800:

> From: Cheng Ming Lin <chengminglin@mxic.com.tw>
> 
> Add two flags for inserting the Plane Select bit into the column
> address during the write_to_cache and the read_from_cache operation.
> 
> Add the SPINAND_HAS_PP_PLANE_SELECT_BIT flag for serial NAND flash

This flag has been renamed :)

> that require inserting the Plane Select bit into the column address
> during the write_to_cache operation.
> 
> Add the SPINAND_HAS_READ_PLANE_SELECT_BIT flag for serial NAND flash
> that require inserting the Plane Select bit into the column address
> during the read_from_cache operation.
> 
> Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> ---
>  drivers/mtd/nand/spi/core.c | 6 ++++++
>  include/linux/mtd/spinand.h | 2 ++
>  2 files changed, 8 insertions(+)
> 
> diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
> index e0b6715e5dfe..e7b592cdbb4c 100644
> --- a/drivers/mtd/nand/spi/core.c
> +++ b/drivers/mtd/nand/spi/core.c
> @@ -386,6 +386,9 @@ static int spinand_read_from_cache_op(struct spinand_device *spinand,
>  	else
>  		rdesc = spinand->dirmaps[req->pos.plane].rdesc_ecc;
>  
> +	if (spinand->flags & SPINAND_HAS_READ_PLANE_SELECT_BIT)
> +		column |= req->pos.plane << fls(nanddev_page_size(nand));

Isn't there any better way to know what the bit position is?

Thanks,
Miquèl

Re: [PATCH v5 1/2] mtd: spinand: Add support for setting plane select bits

[Cheng Ming Lin]

Hi Miquel,

Miquel Raynal <miquel.raynal@bootlin.com> 於 2024年8月30日 週五 下午11:55寫道：
>
> Hi ChengMing,
>
> linchengming884@gmail.com wrote on Fri, 30 Aug 2024 18:03:09 +0800:
>
> > From: Cheng Ming Lin <chengminglin@mxic.com.tw>
> >
> > Add two flags for inserting the Plane Select bit into the column
> > address during the write_to_cache and the read_from_cache operation.
> >
> > Add the SPINAND_HAS_PP_PLANE_SELECT_BIT flag for serial NAND flash
>
> This flag has been renamed :)

Thank you for the reminder. I will make the necessary changes.

>
> > that require inserting the Plane Select bit into the column address
> > during the write_to_cache operation.
> >
> > Add the SPINAND_HAS_READ_PLANE_SELECT_BIT flag for serial NAND flash
> > that require inserting the Plane Select bit into the column address
> > during the read_from_cache operation.
> >
> > Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> > ---
> >  drivers/mtd/nand/spi/core.c | 6 ++++++
> >  include/linux/mtd/spinand.h | 2 ++
> >  2 files changed, 8 insertions(+)
> >
> > diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
> > index e0b6715e5dfe..e7b592cdbb4c 100644
> > --- a/drivers/mtd/nand/spi/core.c
> > +++ b/drivers/mtd/nand/spi/core.c
> > @@ -386,6 +386,9 @@ static int spinand_read_from_cache_op(struct spinand_device *spinand,
> >       else
> >               rdesc = spinand->dirmaps[req->pos.plane].rdesc_ecc;
> >
> > +     if (spinand->flags & SPINAND_HAS_READ_PLANE_SELECT_BIT)
> > +             column |= req->pos.plane << fls(nanddev_page_size(nand));
>
> Isn't there any better way to know what the bit position is?

There are two other methods to determine the bit position:
- column |=

>
> Thanks,
> Miquèl

Re: [PATCH v5 1/2] mtd: spinand: Add support for setting plane select bits

[Cheng Ming Lin]

Hi Miquel,

I accidentally sent the previous email before it was finished.

Miquel Raynal <miquel.raynal@bootlin.com> 於 2024年8月30日 週五 下午11:55寫道：
>
> Hi ChengMing,
>
> linchengming884@gmail.com wrote on Fri, 30 Aug 2024 18:03:09 +0800:
>
> > From: Cheng Ming Lin <chengminglin@mxic.com.tw>
> >
> > Add two flags for inserting the Plane Select bit into the column
> > address during the write_to_cache and the read_from_cache operation.
> >
> > Add the SPINAND_HAS_PP_PLANE_SELECT_BIT flag for serial NAND flash
>
> This flag has been renamed :)

Thank you for the reminder. I will make the necessary changes.

>
> > that require inserting the Plane Select bit into the column address
> > during the write_to_cache operation.
> >
> > Add the SPINAND_HAS_READ_PLANE_SELECT_BIT flag for serial NAND flash
> > that require inserting the Plane Select bit into the column address
> > during the read_from_cache operation.
> >
> > Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> > ---
> >  drivers/mtd/nand/spi/core.c | 6 ++++++
> >  include/linux/mtd/spinand.h | 2 ++
> >  2 files changed, 8 insertions(+)
> >
> > diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
> > index e0b6715e5dfe..e7b592cdbb4c 100644
> > --- a/drivers/mtd/nand/spi/core.c
> > +++ b/drivers/mtd/nand/spi/core.c
> > @@ -386,6 +386,9 @@ static int spinand_read_from_cache_op(struct spinand_device *spinand,
> >       else
> >               rdesc = spinand->dirmaps[req->pos.plane].rdesc_ecc;
> >
> > +     if (spinand->flags & SPINAND_HAS_READ_PLANE_SELECT_BIT)
> > +             column |= req->pos.plane << fls(nanddev_page_size(nand));
>
> Isn't there any better way to know what the bit position is?

There are two other methods to determine the bit position:
- column |= res->pos.plane << fls(nand->memorg.pagesize)
- column |= wdesc->info.offset

>
> Thanks,
> Miquèl

Thanks,
Cheng Ming Lin

Re: [PATCH v5 1/2] mtd: spinand: Add support for setting plane select bits

[Miquel Raynal]

Hi Cheng,

linchengming884@gmail.com wrote on Mon, 2 Sep 2024 16:42:55 +0800:

> Hi Miquel,
> 
> I accidentally sent the previous email before it was finished.
> 
> Miquel Raynal <miquel.raynal@bootlin.com> 於 2024年8月30日 週五 下午11:55寫道：
> >
> > Hi ChengMing,
> >
> > linchengming884@gmail.com wrote on Fri, 30 Aug 2024 18:03:09 +0800:
> >  
> > > From: Cheng Ming Lin <chengminglin@mxic.com.tw>
> > >
> > > Add two flags for inserting the Plane Select bit into the column
> > > address during the write_to_cache and the read_from_cache operation.
> > >
> > > Add the SPINAND_HAS_PP_PLANE_SELECT_BIT flag for serial NAND flash  
> >
> > This flag has been renamed :)  
> 
> Thank you for the reminder. I will make the necessary changes.
> 
> >  
> > > that require inserting the Plane Select bit into the column address
> > > during the write_to_cache operation.
> > >
> > > Add the SPINAND_HAS_READ_PLANE_SELECT_BIT flag for serial NAND flash
> > > that require inserting the Plane Select bit into the column address
> > > during the read_from_cache operation.
> > >
> > > Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> > > ---
> > >  drivers/mtd/nand/spi/core.c | 6 ++++++
> > >  include/linux/mtd/spinand.h | 2 ++
> > >  2 files changed, 8 insertions(+)
> > >
> > > diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
> > > index e0b6715e5dfe..e7b592cdbb4c 100644
> > > --- a/drivers/mtd/nand/spi/core.c
> > > +++ b/drivers/mtd/nand/spi/core.c
> > > @@ -386,6 +386,9 @@ static int spinand_read_from_cache_op(struct spinand_device *spinand,
> > >       else
> > >               rdesc = spinand->dirmaps[req->pos.plane].rdesc_ecc;
> > >
> > > +     if (spinand->flags & SPINAND_HAS_READ_PLANE_SELECT_BIT)
> > > +             column |= req->pos.plane << fls(nanddev_page_size(nand));  
> >
> > Isn't there any better way to know what the bit position is?  
> 
> There are two other methods to determine the bit position:
> - column |= res->pos.plane << fls(nand->memorg.pagesize)
> - column |= wdesc->info.offset

Ok, let's keep it is as-is for now.

Thanks,
Miquèl

Re: [PATCH v5 1/2] mtd: spinand: Add support for setting plane select bits

[Cheng Ming Lin]

Hi Miquel,

Miquel Raynal <miquel.raynal@bootlin.com> 於 2024年9月2日 週一 下午8:28寫道：
>
> Hi Cheng,
>
> linchengming884@gmail.com wrote on Mon, 2 Sep 2024 16:42:55 +0800:
>
> > Hi Miquel,
> >
> > I accidentally sent the previous email before it was finished.
> >
> > Miquel Raynal <miquel.raynal@bootlin.com> 於 2024年8月30日 週五 下午11:55寫道：
> > >
> > > Hi ChengMing,
> > >
> > > linchengming884@gmail.com wrote on Fri, 30 Aug 2024 18:03:09 +0800:
> > >
> > > > From: Cheng Ming Lin <chengminglin@mxic.com.tw>
> > > >
> > > > Add two flags for inserting the Plane Select bit into the column
> > > > address during the write_to_cache and the read_from_cache operation.
> > > >
> > > > Add the SPINAND_HAS_PP_PLANE_SELECT_BIT flag for serial NAND flash
> > >
> > > This flag has been renamed :)
> >
> > Thank you for the reminder. I will make the necessary changes.
> >
> > >
> > > > that require inserting the Plane Select bit into the column address
> > > > during the write_to_cache operation.
> > > >
> > > > Add the SPINAND_HAS_READ_PLANE_SELECT_BIT flag for serial NAND flash
> > > > that require inserting the Plane Select bit into the column address
> > > > during the read_from_cache operation.
> > > >
> > > > Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> > > > ---
> > > >  drivers/mtd/nand/spi/core.c | 6 ++++++
> > > >  include/linux/mtd/spinand.h | 2 ++
> > > >  2 files changed, 8 insertions(+)
> > > >
> > > > diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
> > > > index e0b6715e5dfe..e7b592cdbb4c 100644
> > > > --- a/drivers/mtd/nand/spi/core.c
> > > > +++ b/drivers/mtd/nand/spi/core.c
> > > > @@ -386,6 +386,9 @@ static int spinand_read_from_cache_op(struct spinand_device *spinand,
> > > >       else
> > > >               rdesc = spinand->dirmaps[req->pos.plane].rdesc_ecc;
> > > >
> > > > +     if (spinand->flags & SPINAND_HAS_READ_PLANE_SELECT_BIT)
> > > > +             column |= req->pos.plane << fls(nanddev_page_size(nand));
> > >
> > > Isn't there any better way to know what the bit position is?
> >
> > There are two other methods to determine the bit position:
> > - column |= res->pos.plane << fls(nand->memorg.pagesize)
> > - column |= wdesc->info.offset
>
> Ok, let's keep it is as-is for now.
>

Got it. I'll keep it as-is for now.

> Thanks,
> Miquèl

Thanks,
Cheng Ming Lin