From: Conor Dooley <conor@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Conor Dooley <conor@kernel.org>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
Xingyu Wu <xingyu.wu@starfivetech.com>
Cc: Conor Dooley <conor.dooley@microchip.com>,
Hal Feng <hal.feng@starfivetech.com>,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v7 0/2] Add notifier for PLL0 clock and set it 1.5GHz on the JH7110 SoC
Date: Mon, 9 Sep 2024 15:28:22 +0100 [thread overview]
Message-ID: <20240909-hurled-october-acb5ce74f3bd@spud> (raw)
In-Reply-To: <20240826080430.179788-1-xingyu.wu@starfivetech.com>
From: Conor Dooley <conor.dooley@microchip.com>
On Mon, 26 Aug 2024 16:04:28 +0800, Xingyu Wu wrote:
> This patch is to add the notifier for PLL0 clock and set the PLL0 rate
> to 1.5GHz to fix the lower rate of CPUfreq on the JH7110 SoC.
>
> The first patch is to add the notifier for PLL0 clock. Setting the PLL0
> rate need the son clock (cpu_root) to switch its parent clock to OSC
> clock and switch it back after setting PLL0 rate. It need to use the
> cpu_root clock from SYSCRG and register the notifier in the SYSCRG
> driver.
>
> [...]
Applied to riscv-soc-fixes, thanks!
[2/2] riscv: dts: starfive: jh7110-common: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz
https://git.kernel.org/conor/c/61f2e8a3a941
I applied this last night but forgot to send the ty email.
prev parent reply other threads:[~2024-09-09 14:28 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-26 8:04 [PATCH v7 0/2] Add notifier for PLL0 clock and set it 1.5GHz on the JH7110 SoC Xingyu Wu
2024-08-26 8:04 ` [PATCH v7 1/2] clk: starfive: jh7110-sys: Add notifier for PLL0 clock Xingyu Wu
2024-08-27 5:49 ` Hal Feng
2024-08-28 20:19 ` Stephen Boyd
2024-08-29 5:42 ` Xingyu Wu
2024-08-29 19:24 ` Stephen Boyd
2024-08-29 18:12 ` Michael Jeanson
2024-08-26 8:04 ` [PATCH v7 2/2] riscv: dts: starfive: jh7110-common: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz Xingyu Wu
2024-08-27 5:52 ` Hal Feng
2024-09-09 14:28 ` Conor Dooley [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240909-hurled-october-acb5ce74f3bd@spud \
--to=conor@kernel.org \
--cc=conor.dooley@microchip.com \
--cc=emil.renner.berthing@canonical.com \
--cc=hal.feng@starfivetech.com \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=sboyd@kernel.org \
--cc=xingyu.wu@starfivetech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox