From: Bjorn Helgaas <helgaas@kernel.org>
To: Frank Li <Frank.li@nxp.com>
Cc: "Richard Zhu" <hongxing.zhu@nxp.com>,
"Lucas Stach" <l.stach@pengutronix.de>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Shawn Guo" <shawnguo@kernel.org>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
"Fabio Estevam" <festevam@gmail.com>,
"NXP Linux Team" <linux-imx@nxp.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Liam Girdwood" <lgirdwood@gmail.com>,
"Mark Brown" <broonie@kernel.org>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
linux-pci@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, bpf@vger.kernel.org,
devicetree@vger.kernel.org,
"Qianqiang Liu" <qianqiang.liu@163.com>
Subject: Re: [PATCH v8 11/11] PCI: imx6: Add i.MX8Q PCIe root complex (RC) support
Date: Wed, 11 Sep 2024 11:33:56 -0500 [thread overview]
Message-ID: <20240911163356.GA643833@bhelgaas> (raw)
In-Reply-To: <ZuG1BfhQpd9GajNH@lizhi-Precision-Tower-5810>
On Wed, Sep 11, 2024 at 11:19:33AM -0400, Frank Li wrote:
> On Wed, Sep 11, 2024 at 09:07:21AM -0500, Bjorn Helgaas wrote:
> > [+cc Qianqiang]
> >
> > On Mon, Jul 29, 2024 at 04:18:18PM -0400, Frank Li wrote:
> > > From: Richard Zhu <hongxing.zhu@nxp.com>
> > >
> > > Implement i.MX8Q (i.MX8QM, i.MX8QXP, and i.MX8DXL) PCIe RC support. While
> > > the controller resembles that of iMX8MP, the PHY differs significantly.
> > > Notably, there's a distinction between PCI bus addresses and CPU addresses.
> > >
> > > Introduce IMX_PCIE_FLAG_CPU_ADDR_FIXUP in drvdata::flags to indicate driver
> > > need the cpu_addr_fixup() callback to facilitate CPU address to PCI bus
> > > address conversion according to "ranges" property.
> >
> > > +static u64 imx_pcie_cpu_addr_fixup(struct dw_pcie *pcie, u64 cpu_addr)
> > > +{
> > > + struct imx_pcie *imx_pcie = to_imx_pcie(pcie);
> > > + struct dw_pcie_rp *pp = &pcie->pp;
> > > + struct resource_entry *entry;
> > > + unsigned int offset;
> > > +
> > > + if (!(imx_pcie->drvdata->flags & IMX_PCIE_FLAG_CPU_ADDR_FIXUP))
> > > + return cpu_addr;
> > > +
> > > + entry = resource_list_first_type(&pp->bridge->windows, IORESOURCE_MEM);
> > > + offset = entry->offset;
> > > + return (cpu_addr - offset);
> > > +}
> >
> > I'm sure that with enough effort, we could prove "entry" cannot be
> > NULL here, but I'm not sure I want to spend the effort, and we're
> > going to end up with more patches like this:
> >
> > https://lore.kernel.org/r/20240911125055.58555-1-qianqiang.liu@163.com
> >
> > I propose this minor change:
> >
> > entry = resource_list_first_type(&pp->bridge->windows, IORESOURCE_MEM);
> > if (!entry)
> > return cpu_addr;
> >
> > return cpu_addr - entry->offset;
> >
> > I still think we should get rid of the .cpu_addr_fixup() callback if
> > possible. But that's a discussion for another day.
>
> Stop these fake alarm from some tools's scan. entry never be NULL here.
> I am working on EP side by involve a "ranges" support like RC side.
>
> Or just omit this kinds of patches.
As I said initially, we probably *could* prove that "entry" can never
be NULL here, but why should I have to spend the effort to do that?
The "windows" list is not even built in this file, so it's not
trivial. And even if "entry" can't be NULL now, what's to prevent
that assumption from breaking in the future?
I don't think there's anything wrong with checking for NULL here, and
it avoids copy/pasting this somewhere where it *does* matter. So I'm
in favor of this kind of patch.
Bjorn
next prev parent reply other threads:[~2024-09-11 16:33 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-29 20:18 [PATCH v8 00/11] PCI: imx6: Fix\rename\clean up and add lut information for imx95 Frank Li
2024-07-29 20:18 ` [PATCH v8 01/11] PCI: imx6: Fix establish link failure in EP mode for iMX8MM and iMX8MP Frank Li
2024-09-02 20:59 ` Bjorn Helgaas
2024-09-02 22:57 ` Frank Li
2024-09-02 21:12 ` Bjorn Helgaas
2024-09-02 22:51 ` Frank Li
2024-09-02 22:59 ` Bjorn Helgaas
2024-07-29 20:18 ` [PATCH v8 02/11] PCI: imx6: Fix i.MX8MP PCIe EP's occasional failure to trigger MSI Frank Li
2024-07-29 20:18 ` [PATCH v8 03/11] PCI: imx6: Fix missing call to phy_power_off() in error handling Frank Li
2024-08-07 2:35 ` Manivannan Sadhasivam
2024-07-29 20:18 ` [PATCH v8 04/11] PCI: imx6: Rename imx6_* with imx_* Frank Li
2024-09-03 19:37 ` Bjorn Helgaas
2024-09-03 19:50 ` Frank Li
2024-07-29 20:18 ` [PATCH v8 05/11] PCI: imx6: Introduce SoC specific callbacks for controlling REFCLK Frank Li
2024-08-07 2:36 ` Manivannan Sadhasivam
2024-07-29 20:18 ` [PATCH v8 06/11] PCI: imx6: Simplify switch-case logic by involve core_reset callback Frank Li
2024-07-29 20:18 ` [PATCH v8 07/11] PCI: imx6: Improve comment for workaround ERR010728 Frank Li
2024-07-29 20:18 ` [PATCH v8 08/11] PCI: imx6: Consolidate redundant if-checks Frank Li
2024-07-29 20:18 ` [PATCH v8 09/11] dt-bindings: imx6q-pcie: Add i.MX8Q pcie compatible string Frank Li
2024-07-29 20:18 ` [PATCH v8 10/11] PCI: imx6: Call common PHY API to set mode, speed, and submode Frank Li
2024-07-29 20:18 ` [PATCH v8 11/11] PCI: imx6: Add i.MX8Q PCIe root complex (RC) support Frank Li
2024-09-03 1:49 ` Bjorn Helgaas
2024-09-03 20:35 ` Frank Li
2024-09-03 21:09 ` Bjorn Helgaas
2024-09-11 14:07 ` Bjorn Helgaas
2024-09-11 15:19 ` Frank Li
2024-09-11 16:33 ` Bjorn Helgaas [this message]
2024-09-11 18:07 ` Frank Li
2024-08-06 20:33 ` [PATCH v8 00/11] PCI: imx6: Fix\rename\clean up and add lut information for imx95 Frank Li
2024-08-07 2:38 ` Manivannan Sadhasivam
2024-08-15 14:56 ` Frank Li
2024-08-22 17:03 ` Frank Li
2024-08-29 21:25 ` Frank Li
2024-09-01 17:55 ` Krzysztof Wilczyński
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240911163356.GA643833@bhelgaas \
--to=helgaas@kernel.org \
--cc=Frank.li@nxp.com \
--cc=bhelgaas@google.com \
--cc=bpf@vger.kernel.org \
--cc=broonie@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=festevam@gmail.com \
--cc=hongxing.zhu@nxp.com \
--cc=imx@lists.linux.dev \
--cc=kernel@pengutronix.de \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=kw@linux.com \
--cc=l.stach@pengutronix.de \
--cc=lgirdwood@gmail.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-imx@nxp.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=manivannan.sadhasivam@linaro.org \
--cc=p.zabel@pengutronix.de \
--cc=qianqiang.liu@163.com \
--cc=robh@kernel.org \
--cc=s.hauer@pengutronix.de \
--cc=shawnguo@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox