From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A09E13C8F4; Wed, 25 Sep 2024 11:45:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727264722; cv=none; b=j7Jpscch7gvLyE2w5EB+VhKLq6HyRbXtDxgdYZZ9im81M/c0sEwQl8a3PIlK2/46/MVfNG4uFUwUMj89gtF7ufYcK0E2Y1V3bCs4J5oYmcZEtdVMe/NEFSde7M4ZRcDHMiQlL4ZIaruHqP916HeMQ3T3oiidJZ8mJnH8t0bsPpo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727264722; c=relaxed/simple; bh=ew1h9cN6vpzPHipXs8JejMfS/NjBHhTL7DFknsIRqyk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=daHg1GfIchy0vTOARlnprUmb597GiJ8mFU7yYnTmlX3AK6uvKlNa3GPjChimplTmtbwJoPtqcWCp10DAQTyMR8AEs84nF0IvfJPOsyewoyjx6+Uq7IsRBAoWS4Z0PAXNkNL5OXMMm2shvLfJKDnG0ZDiLQ9ARu/L5VRRCrEWJ7Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=SYVEVt2W; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="SYVEVt2W" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 83A72C4CEC3; Wed, 25 Sep 2024 11:45:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1727264722; bh=ew1h9cN6vpzPHipXs8JejMfS/NjBHhTL7DFknsIRqyk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SYVEVt2W+5qg3cKQbXgHE+QqpJhCwCkAuf7iIUo78SJxIwOBGFzjsO+DlYoVp5bM9 CFKXr8DfLnPWY+7QWxZyy0O9DUw3VtchNEuAP6bjRMlR/rZCfTdq3o9AZ+Fv8hCPz7 tHu0t5/RzQDFrSkX+2GihYM9sdcuvudOHmagsKvjP7pAdKgXi6Z8KY/ufA+oSCYRov KR0ML7ZbJBTornQqIC/zNImEQCic8d1Z46m3I7M7G1hcbuxwzgkTqqZyrIa0WdHsZk 2WVER3Hg7dtSJxI09zfSI4r9xrikbZiAnocotO7PUjwlSzzduWbhaSlpt5QT7xcANV 64t39/e1UAOmQ== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Srinivasan Shanmugam , Tom Chung , Rodrigo Siqueira , Roman Li , Alex Hung , Aurabindo Pillai , Harry Wentland , Hamza Mahfooz , Alex Deucher , Sasha Levin , sunpeng.li@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch, alvin.lee2@amd.com, samson.tam@amd.com, wenjing.liu@amd.com, dillon.varone@amd.com, yi-lchen@amd.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 6.11 140/244] drm/amd/display: Add NULL check for clk_mgr in dcn32_init_hw Date: Wed, 25 Sep 2024 07:26:01 -0400 Message-ID: <20240925113641.1297102-140-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240925113641.1297102-1-sashal@kernel.org> References: <20240925113641.1297102-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 6.11 Content-Transfer-Encoding: 8bit From: Srinivasan Shanmugam [ Upstream commit c395fd47d1565bd67671f45cca281b3acc2c31ef ] This commit addresses a potential null pointer dereference issue in the `dcn32_init_hw` function. The issue could occur when `dc->clk_mgr` is null. The fix adds a check to ensure `dc->clk_mgr` is not null before accessing its functions. This prevents a potential null pointer dereference. Reported by smatch: drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn32/dcn32_hwseq.c:961 dcn32_init_hw() error: we previously assumed 'dc->clk_mgr' could be null (see line 782) Cc: Tom Chung Cc: Rodrigo Siqueira Cc: Roman Li Cc: Alex Hung Cc: Aurabindo Pillai Cc: Harry Wentland Cc: Hamza Mahfooz Signed-off-by: Srinivasan Shanmugam Reviewed-by: Alex Hung Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c index 05d8f81daa064..39fd3f58886c5 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c @@ -779,7 +779,7 @@ void dcn32_init_hw(struct dc *dc) uint32_t backlight = MAX_BACKLIGHT_LEVEL; uint32_t user_level = MAX_BACKLIGHT_LEVEL; - if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks) + if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->init_clocks) dc->clk_mgr->funcs->init_clocks(dc->clk_mgr); // Initialize the dccg @@ -958,10 +958,11 @@ void dcn32_init_hw(struct dc *dc) if (!dcb->funcs->is_accelerated_mode(dcb) && dc->res_pool->hubbub->funcs->init_watermarks) dc->res_pool->hubbub->funcs->init_watermarks(dc->res_pool->hubbub); - if (dc->clk_mgr->funcs->notify_wm_ranges) + if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->notify_wm_ranges) dc->clk_mgr->funcs->notify_wm_ranges(dc->clk_mgr); - if (dc->clk_mgr->funcs->set_hard_max_memclk && !dc->clk_mgr->dc_mode_softmax_enabled) + if (dc->clk_mgr && dc->clk_mgr->funcs && dc->clk_mgr->funcs->set_hard_max_memclk && + !dc->clk_mgr->dc_mode_softmax_enabled) dc->clk_mgr->funcs->set_hard_max_memclk(dc->clk_mgr); if (dc->res_pool->hubbub->funcs->force_pstate_change_control) -- 2.43.0