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From: Jason Gunthorpe <jgg@nvidia.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: linux-kernel@vger.kernel.org, iommu@lists.linux.dev,
	joro@8bytes.org, robin.murphy@arm.com, vasant.hegde@amd.com,
	kevin.tian@intel.com, jon.grimm@amd.com, santosh.shukla@amd.com,
	pandoh@google.com, kumaranand@google.com
Subject: Re: [PATCH v4 5/6] iommu/amd: Modify clear_dte_entry() to avoid in-place update
Date: Thu, 26 Sep 2024 16:54:23 -0300	[thread overview]
Message-ID: <20240926195423.GR9417@nvidia.com> (raw)
In-Reply-To: <20240916171805.324292-6-suravee.suthikulpanit@amd.com>

On Mon, Sep 16, 2024 at 05:18:04PM +0000, Suravee Suthikulpanit wrote:

> -static void clear_dte_entry(struct amd_iommu *iommu, u16 devid)
> +static void clear_dte_entry(struct amd_iommu *iommu, struct iommu_dev_data *dev_data)
>  {
> -	struct dev_table_entry *dev_table = get_dev_table(iommu);
> +	struct dev_table_entry new;
> +	struct dev_table_entry *dte = &get_dev_table(iommu)[dev_data->devid];
> +
> +	/*
> +	 * Need to preserve DTE[96:106] because certain fields are
> +	 * programmed using value in IVRS table from early init phase.
> +	 */
> +	new.data[0] = DTE_FLAG_V;
>  
> -	/* remove entry from the device table seen by the hardware */
> -	dev_table[devid].data[0]  = DTE_FLAG_V;
> +	/* Apply erratum 63 */
> +	if (FIELD_GET(DTE_SYSMGT_MASK, dte->data[1]) == 0x01)
> +		new.data[0] |= BIT_ULL(DEV_ENTRY_IW);
>  
>  	if (!amd_iommu_snp_en)
> -		dev_table[devid].data[0] |= DTE_FLAG_TV;
> +		new.data[0] |= DTE_FLAG_TV;
> +
> +	/* Need to preserve DTE[96:106] */
> +	new.data[1] = dte->data[1] & DTE_FLAG_MASK;
>  
> -	dev_table[devid].data[1] &= DTE_FLAG_MASK;
> +	/* Need to preserve interrupt remapping information in DTE[128:255] */
> +	new.data128[1] = dte->data128[1];

It doesn't, update_dte256() does this automatically. Just leave it
zero here.

> -	amd_iommu_apply_erratum_63(iommu, devid);
> +	update_dte256(iommu, dev_data, &new);
>  }

I suggest you change this slightly so the flow is more like

make_clear_dte(..., struct dev_table_entry *entry) {..}

Which would have most of the above. Then:

clear_dte_entry()
{
    struct dev_table_entry target;

    make_clear_dte(.., &target);
    update_dte256(iommu, dev_data, &new);
}

And then in the prior patches you can write like:

static void make_dte_gcr3_table(struct amd_iommu *iommu,
                              struct iommu_dev_data *dev_data,
                              struct dev_table_entry *target)
{
    make_clear_dte(.., &target);
    ...
}

And drop all the wild masking:

+       /* First mask out possible old values for GCR3 table */
+       tmp = DTE_GCR3_VAL_A(~0ULL) << DTE_GCR3_SHIFT_A;
+       target->data[0] &= ~tmp;
+       tmp = DTE_GCR3_VAL_B(~0ULL) << DTE_GCR3_SHIFT_B;
+       tmp |= DTE_GCR3_VAL_C(~0ULL) << DTE_GCR3_SHIFT_C;
+       target->data[1] &= ~tmp;

Since make_clear_dte() already zero'd these fields.

Jason

  reply	other threads:[~2024-09-26 19:54 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-16 17:17 [PATCH v4 0/6] iommu/amd: Use 128-bit cmpxchg operation to update DTE Suravee Suthikulpanit
2024-09-16 17:18 ` [PATCH v4 1/6] iommu/amd: Disable AMD IOMMU if CMPXCHG16B feature is not supported Suravee Suthikulpanit
2024-09-16 17:18 ` [PATCH v4 2/6] iommu/amd: Introduce helper function to update 256-bit DTE Suravee Suthikulpanit
2024-09-26 19:46   ` Jason Gunthorpe
2024-10-03 16:15     ` Suthikulpanit, Suravee
2024-10-03 18:54       ` Jason Gunthorpe
2024-09-16 17:18 ` [PATCH v4 3/6] iommu/amd: Modify set_dte_entry() to use 256-bit DTE helpers Suravee Suthikulpanit
2024-09-26 19:56   ` Jason Gunthorpe
2024-10-03 16:16     ` Suthikulpanit, Suravee
2024-10-03 18:49       ` Jason Gunthorpe
2024-09-16 17:18 ` [PATCH v4 4/6] iommu/amd: Introduce helper function get_dte256() Suravee Suthikulpanit
2024-09-26 19:49   ` Jason Gunthorpe
2024-09-16 17:18 ` [PATCH v4 5/6] iommu/amd: Modify clear_dte_entry() to avoid in-place update Suravee Suthikulpanit
2024-09-26 19:54   ` Jason Gunthorpe [this message]
2024-10-03 16:15     ` Suthikulpanit, Suravee
2024-09-16 17:18 ` [PATCH v4 6/6] iommu/amd: Lock DTE before updating the entry with WRITE_ONCE() Suravee Suthikulpanit
2024-09-26 19:58   ` Jason Gunthorpe
2024-09-23 15:03 ` [PATCH v4 0/6] iommu/amd: Use 128-bit cmpxchg operation to update DTE Suthikulpanit, Suravee

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