Re: [PATCH v5 3/6] iommu/amd: Modify set_dte_entry() to use 256-bit DTE helpers

[Jason Gunthorpe <jgg@nvidia.com>]

On Mon, Oct 07, 2024 at 04:13:50AM +0000, Suravee Suthikulpanit wrote:
> +static void make_clear_dte(struct amd_iommu *iommu, struct dev_table_entry *dte,
> +			   struct dev_table_entry *new)
> +{
> +	new->data[0] = DTE_FLAG_V;
> +
> +	/* Apply erratum 63 */
> +	if (FIELD_GET(DTE_SYSMGT_MASK, dte->data[1]) == 0x01)
> +		new->data[0] |= BIT_ULL(DEV_ENTRY_IW);
> +
> +	if (!amd_iommu_snp_en)
> +		new->data[0] |= DTE_FLAG_TV;

It would be nice to have a comment here.. 

clear_dte() must create a blocking configuration as several callers
depend on that.

Why is blocking with TV=1,Mode=0,IW=0,IR=0 used sometimes but
sometimes TV=0 is used instead?

> +	/* Need to preserve interrupt remapping information in DTE[128:255] */
> +	new->data128[1] = dte->data128[1];

It doesn't need to preserve.. write_dte_upper128() does the
preservation automatically under the right lock. Any bits in
DTE_DATA2_INTR_MASK should be 0 for the input DTE because they will be
ignored by the masking:

+               new->data[2] &= ~DTE_DATA2_INTR_MASK;
+               new->data[2] |= old.data[2] & (DTE_DATA2_INTR_MASK | DTE_DATA2_RESV_MASK);

Also this shouldn't preserve the top Guest related 64 bit for a 'clear
dte' either.

So, I think this can just be

   new->data128[1] = 0;

?

Jason