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From: Jason Gunthorpe <jgg@nvidia.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: linux-kernel@vger.kernel.org, iommu@lists.linux.dev,
	joro@8bytes.org, robin.murphy@arm.com, vasant.hegde@amd.com,
	kevin.tian@intel.com, jon.grimm@amd.com, santosh.shukla@amd.com,
	pandoh@google.com, kumaranand@google.com
Subject: Re: [PATCH v5 3/6] iommu/amd: Modify set_dte_entry() to use 256-bit DTE helpers
Date: Mon, 7 Oct 2024 11:17:56 -0300	[thread overview]
Message-ID: <20241007141756.GR1365916@nvidia.com> (raw)
In-Reply-To: <20241007041353.4756-4-suravee.suthikulpanit@amd.com>

On Mon, Oct 07, 2024 at 04:13:50AM +0000, Suravee Suthikulpanit wrote:
> diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
> index deb19af48a3e..6fa2f5bb5156 100644
> --- a/drivers/iommu/amd/iommu.c
> +++ b/drivers/iommu/amd/iommu.c
> @@ -1956,90 +1956,114 @@ int amd_iommu_clear_gcr3(struct iommu_dev_data *dev_data, ioasid_t pasid)
>  	return ret;
>  }
>  
> +static void make_clear_dte(struct amd_iommu *iommu, struct dev_table_entry *dte,
> +			   struct dev_table_entry *new)
> +{
> +	new->data[0] = DTE_FLAG_V;
> +
> +	/* Apply erratum 63 */
> +	if (FIELD_GET(DTE_SYSMGT_MASK, dte->data[1]) == 0x01)
> +		new->data[0] |= BIT_ULL(DEV_ENTRY_IW);

Doesn't this need to be

/* Preserve set_dev_entry_from_acpi(), including erratum 64 */
new->data[1] |= dte->data[1] & DTE_SYSMGT_MASK;
if (FIELD_GET(DTE_SYSMGT_MASK, dte->data[1]) == 0x01)
   	new->data[0] |= BIT_ULL(DEV_ENTRY_IW);

And this has a significant security issue, we can't set IW here
because clear_dte must generate a blocked DTE, so TV=1,Mode=0,IW=1 is
not an OK setting!!

Jason

  parent reply	other threads:[~2024-10-07 14:18 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-07  4:13 [PATCH v5 0/6] iommu/amd: Use 128-bit cmpxchg operation to update DTE Suravee Suthikulpanit
2024-10-07  4:13 ` [PATCH v5 1/6] iommu/amd: Disable AMD IOMMU if CMPXCHG16B feature is not supported Suravee Suthikulpanit
2024-10-07  4:13 ` [PATCH v5 2/6] iommu/amd: Introduce helper function to update 256-bit DTE Suravee Suthikulpanit
2024-10-07 14:06   ` Jason Gunthorpe
2024-10-11  5:25     ` Suthikulpanit, Suravee
2024-10-07 14:42   ` Uros Bizjak
2024-10-11 10:22     ` Suthikulpanit, Suravee
2024-10-11 11:05       ` Uros Bizjak
2024-10-07  4:13 ` [PATCH v5 3/6] iommu/amd: Modify set_dte_entry() to use 256-bit DTE helpers Suravee Suthikulpanit
2024-10-07 14:05   ` Jason Gunthorpe
2024-10-16  5:12     ` Suthikulpanit, Suravee
2024-10-07 14:17   ` Jason Gunthorpe [this message]
2024-10-16  5:15     ` Suthikulpanit, Suravee
2024-10-07  4:13 ` [PATCH v5 4/6] iommu/amd: Introduce helper function get_dte256() Suravee Suthikulpanit
2024-10-07  4:13 ` [PATCH v5 5/6] iommu/amd: Modify clear_dte_entry() to avoid in-place update Suravee Suthikulpanit
2024-10-07 14:10   ` Jason Gunthorpe
2024-10-07  4:13 ` [PATCH v5 6/6] iommu/amd: Lock DTE before updating the entry with WRITE_ONCE() Suravee Suthikulpanit

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