[PATCH 0/5] Use ti,j784s4-pcie-ctrl for PCIe CTRL spaces

Andrew Davis
2024-10-16T23:31:03Z

Hello all,

Now that we have ti,j784s4-pcie-ctrl[0] let's use it. This makes these
K3 SoCs all match what is already done for J784s4.

No functional change, DT changes are fully backwards and forwards
compatible.

Thanks,
Andrew

[0] commit cc1965b02d6c ("dt-bindings: mfd: syscon: Add ti,j784s4-pcie-ctrl compatible")

Andrew Davis (5):
dt-bindings: soc: ti: ti,j721e-system-controller: Add PCIe ctrl
property
arm64: dts: ti: k3-j721e: Add PCIe ctrl node to scm_conf region
arm64: dts: ti: k3-j7200: Add PCIe ctrl node to scm_conf region
arm64: dts: ti: k3-j721s2: Add PCIe ctrl node to scm_conf region
arm64: dts: ti: k3-am64: Add PCIe ctrl node to main_conf region

.../soc/ti/ti,j721e-system-controller.yaml | 5 ++++
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 7 ++++-
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 7 ++++-
.../boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso | 2 +-
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 28 ++++++++++++++++---
.../boot/dts/ti/k3-j721s2-evm-pcie1-ep.dtso | 2 +-
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 7 ++++-
7 files changed, 49 insertions(+), 9 deletions(-)

--
2.39.2