Re: [PATCH 1/5] dt-bindings: soc: ti: ti,j721e-system-controller: Add PCIe ctrl property

Jayesh Choudhary
2025-04-02T09:29:47Z

Hello Rob,

On 18/10/24 18:34, Rob Herring wrote:
> On Wed, Oct 16, 2024 at 06:30:40PM -0500, Andrew Davis wrote:
>> Add a pattern property for pcie-ctrl which can be part of this controller.
>>
>> Signed-off-by: Andrew Davis <afd@ti.com>
>> ---
>> .../bindings/soc/ti/ti,j721e-system-controller.yaml | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
>> index 378e9cc5fac2a..2a64fc61d1262 100644
>> --- a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
>> +++ b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
>> @@ -68,6 +68,11 @@ patternProperties:
>> description:
>> The node corresponding to SoC chip identification.
>>
>> + "^pcie-ctrl@[0-9a-f]+$":
>> + type: object
>> + description:
>> + This is the PCIe control region.
>
> What goes in this node?

This node corresponds to PCIe control register
(used/updated by j721e_pcie_driver for setting the mode, RC or EP)

There are new overlays now that need to be updated as well, with
each SoC.
Will re-roll v2 with updated description and examples in the bindings
and taking into account the new overlays.

Warm Regards,
Jayesh

>
>> +
>> required:
>> - compatible
>> - reg
>> --
>> 2.39.2
>>