RE: [PATCH v4 0/9] A bunch of changes to refine i.MX PCIe driver

Hongxing Zhu
2024-10-18T01:39:08Z

Hi Manivannan:
Can you help to review this series patches?
Thanks in advanced.

Best Regards
Richard Zhu

> -----Original Message-----
> From: Richard Zhu <hongxing.zhu@nxp.com>
> Sent: 2024年10月15日 16:33
> To: kw@linux.com; manivannan.sadhasivam@linaro.org;
> bhelgaas@google.com; lpieralisi@kernel.org; Frank Li <frank.li@nxp.com>;
> l.stach@pengutronix.de; robh+dt@kernel.org; conor+dt@kernel.org;
> shawnguo@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> festevam@gmail.com; s.hauer@pengutronix.de
> Cc: Hongxing Zhu <hongxing.zhu@nxp.com>; linux-pci@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> devicetree@vger.kernel.org; kernel@pengutronix.de; imx@lists.linux.dev
> Subject: [PATCH v4 0/9] A bunch of changes to refine i.MX PCIe driver
>
> A bunch of changes to refine i.MX PCIe driver.
> - Add ref clock gate for i.MX95 PCIe by #1, #2 and #9 patches.
> The changes of clock part are here [1].
> [1]
> https://lkml.or/
> g%2Flkml%2F2024%2F10%2F15%2F390&data=05%7C02%7Chongxing.zhu%4
> 0nxp.com%7Cc7634ee6fb8640ab102808dcecf76207%7C686ea1d3bc2b4c6fa
> 92cd99c5c301635%7C0%7C0%7C638645794454239228%7CUnknown%7CT
> WFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLC
> JXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=wAIxX5kGS3OZS33GfDVdo%2FNOf
> AxWxsA6Sc%2FAOlXkuzM%3D&reserved=0
> - #3 and #4 patches clean i.MX PCIe driver by removing useless codes.
> Patch #3 depends on dts changes. And the dts changes had been applied
> by Shawn, there is no dependecy now.
> - Make core reset and enable_ref_clk symmetric for i.MX PCIe driver by
> #5 and #6 patches.
> - Use dwc common suspend resume method, and enable i.MX8MQ, i.MX8Q
> and
> i.MX95 PCIe PM supports by #7 and #8 patches.
>
> v4 changes:
> It's my fault that I missing Manivanna in the reviewer list.
> I'm sorry about that.
> - Rebase to v6.12-rc3, and resolve the dtsi conflictions.
> Add Manivanna into reviewer list.
>
> v3 changes:
> - Update EP binding refer to comments provided by Krzysztof Kozlowski.
> Thanks.
>
> v2 changes:
> - Add the reasons why one more clock is added for i.MX95 PCIe in patch #1.
> - Add the "Reviewed-by: Frank Li <Frank.Li@nxp.com>" into patch #2, #4, #5,
> #6, #8 and #9.
>
> [PATCH v4 1/9] dt-bindings: imx6q-pcie: Add ref clock for i.MX95 PCIe [PATCH
> v4 2/9] PCI: imx6: Add ref clock for i.MX95 PCIe [PATCH v4 3/9] PCI: imx6:
> Fetch dbi2 and iATU base addesses from DT [PATCH v4 4/9] PCI: imx6: Correct
> controller_id generation logic for [PATCH v4 5/9] PCI: imx6: Make core reset
> assertion deassertion [PATCH v4 6/9] PCI: imx6: Make *_enable_ref_clk()
> function symmetric [PATCH v4 7/9] PCI: imx6: Use dwc common suspend
> resume method [PATCH v4 8/9] PCI: imx6: Add i.MX8MQ i.MX8Q and i.MX95
> PCIe PM [PATCH v4 9/9] arm64: dts: imx95: Add ref clock for i.MX95 PCIe
>
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml | 4
> +-
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml | 1 +
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 25
> ++++++++++--
> arch/arm64/boot/dts/freescale/imx95.dtsi |
> 18 +++++++--
> drivers/pci/controller/dwc/pci-imx6.c |
> 166
> +++++++++++++++++++++++++++-------------------------------------------------
> 5 files changed, 97 insertions(+), 117 deletions(-)