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Thu, 24 Oct 2024 02:49:21 -0700 (PDT) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 24 Oct 2024 02:49:20 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Thu, 24 Oct 2024 02:49:20 -0700 Received: from hyd1403.caveonetworks.com (unknown [10.29.37.84]) by maili.marvell.com (Postfix) with ESMTP id 855643F709B; Thu, 24 Oct 2024 02:49:16 -0700 (PDT) Date: Thu, 24 Oct 2024 15:19:15 +0530 From: Linu Cherian To: Kalesh Anakkur Purayil CC: , , , , , , , , , , Subject: Re: [PATCH v3 net-next 2/2] octeontx2-af: Knobs for NPC default rule counters Message-ID: <20241024094915.GA954957@hyd1403.caveonetworks.com> References: <20241017084244.1654907-1-lcherian@marvell.com> <20241017084244.1654907-3-lcherian@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Proofpoint-GUID: rYBxsXTECHGO7YvdVUKdg771HLlv4M0t X-Proofpoint-ORIG-GUID: rYBxsXTECHGO7YvdVUKdg771HLlv4M0t X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 Hi Kalesh, On 2024-10-18 at 08:39:40, Kalesh Anakkur Purayil (kalesh-anakkur.purayil@broadcom.com) wrote: > On Thu, Oct 17, 2024 at 2:14 PM Linu Cherian wrote: > > > > Add devlink knobs to enable/disable counters on NPC > > default rule entries. > > > > Sample command to enable default rule counters: > > devlink dev param set name npc_def_rule_cntr value true cmode runtime > > > > Sample command to read the counter: > > cat /sys/kernel/debug/cn10k/npc/mcam_rules > > > > Signed-off-by: Linu Cherian > > --- > > Changelog from v2: > > Moved out the refactoring into separate patch. > > > > .../net/ethernet/marvell/octeontx2/af/rvu.h | 2 + > > .../marvell/octeontx2/af/rvu_devlink.c | 32 +++++++++++++ > > .../ethernet/marvell/octeontx2/af/rvu_npc.c | 45 +++++++++++++++++++ > > 3 files changed, 79 insertions(+) > > > > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h > > index d92a5f47a476..e8c6a6fe9bd5 100644 > > --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h > > +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h > > @@ -525,6 +525,7 @@ struct rvu { > > struct mutex alias_lock; /* Serialize bar2 alias access */ > > int vfs; /* Number of VFs attached to RVU */ > > u16 vf_devid; /* VF devices id */ > > + bool def_rule_cntr_en; > > int nix_blkaddr[MAX_NIX_BLKS]; > > > > /* Mbox */ > > @@ -989,6 +990,7 @@ void npc_set_mcam_action(struct rvu *rvu, struct npc_mcam *mcam, > > void npc_read_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam, > > int blkaddr, u16 src, struct mcam_entry *entry, > > u8 *intf, u8 *ena); > > +int npc_config_cntr_default_entries(struct rvu *rvu, bool enable); > > bool is_cgx_config_permitted(struct rvu *rvu, u16 pcifunc); > > bool is_mac_feature_supported(struct rvu *rvu, int pf, int feature); > > u32 rvu_cgx_get_fifolen(struct rvu *rvu); > > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c > > index 7498ab429963..9c26e19a860b 100644 > > --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c > > +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c > > @@ -1238,6 +1238,7 @@ enum rvu_af_dl_param_id { > > RVU_AF_DEVLINK_PARAM_ID_DWRR_MTU, > > RVU_AF_DEVLINK_PARAM_ID_NPC_MCAM_ZONE_PERCENT, > > RVU_AF_DEVLINK_PARAM_ID_NPC_EXACT_FEATURE_DISABLE, > > + RVU_AF_DEVLINK_PARAM_ID_NPC_DEF_RULE_CNTR_ENABLE, > > RVU_AF_DEVLINK_PARAM_ID_NIX_MAXLF, > > }; > > > > @@ -1358,6 +1359,32 @@ static int rvu_af_dl_npc_mcam_high_zone_percent_validate(struct devlink *devlink > > return 0; > > } > > > > +static int rvu_af_dl_npc_def_rule_cntr_get(struct devlink *devlink, u32 id, > > + struct devlink_param_gset_ctx *ctx) > > +{ > > + struct rvu_devlink *rvu_dl = devlink_priv(devlink); > > + struct rvu *rvu = rvu_dl->rvu; > > + > > + ctx->val.vbool = rvu->def_rule_cntr_en; > > + > > + return 0; > > +} > > + > > +static int rvu_af_dl_npc_def_rule_cntr_set(struct devlink *devlink, u32 id, > > + struct devlink_param_gset_ctx *ctx, > > + struct netlink_ext_ack *extack) > > +{ > > + struct rvu_devlink *rvu_dl = devlink_priv(devlink); > > + struct rvu *rvu = rvu_dl->rvu; > > + int err; > > + > > + err = npc_config_cntr_default_entries(rvu, ctx->val.vbool); > > + if (!err) > > + rvu->def_rule_cntr_en = ctx->val.vbool; > > + > > + return err; > > +} > > + > > static int rvu_af_dl_nix_maxlf_get(struct devlink *devlink, u32 id, > > struct devlink_param_gset_ctx *ctx) > > { > > @@ -1444,6 +1471,11 @@ static const struct devlink_param rvu_af_dl_params[] = { > > rvu_af_dl_npc_mcam_high_zone_percent_get, > > rvu_af_dl_npc_mcam_high_zone_percent_set, > > rvu_af_dl_npc_mcam_high_zone_percent_validate), > > + DEVLINK_PARAM_DRIVER(RVU_AF_DEVLINK_PARAM_ID_NPC_DEF_RULE_CNTR_ENABLE, > > + "npc_def_rule_cntr", DEVLINK_PARAM_TYPE_BOOL, > > + BIT(DEVLINK_PARAM_CMODE_RUNTIME), > > + rvu_af_dl_npc_def_rule_cntr_get, > > + rvu_af_dl_npc_def_rule_cntr_set, NULL), > > DEVLINK_PARAM_DRIVER(RVU_AF_DEVLINK_PARAM_ID_NIX_MAXLF, > > "nix_maxlf", DEVLINK_PARAM_TYPE_U16, > > BIT(DEVLINK_PARAM_CMODE_RUNTIME), > > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c > > index c4ef1e83cc46..9e39c3149a4f 100644 > > --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c > > +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c > > @@ -2691,6 +2691,51 @@ void npc_mcam_rsrcs_reserve(struct rvu *rvu, int blkaddr, int entry_idx) > > npc_mcam_set_bit(mcam, entry_idx); > > } > > > > +int npc_config_cntr_default_entries(struct rvu *rvu, bool enable) > > +{ > > + struct npc_install_flow_rsp rsp = { 0 }; > > + struct npc_mcam *mcam = &rvu->hw->mcam; > [Kalesh] Maintain RCT order for variable declarartion Not seeing an issue on my vim editor. Could you please recheck if this is mail client issue ? Thanks Linu Cherian.