From: Jason Gunthorpe <jgg@nvidia.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: linux-kernel@vger.kernel.org, iommu@lists.linux.dev,
joro@8bytes.org, robin.murphy@arm.com, vasant.hegde@amd.com,
kevin.tian@intel.com, jon.grimm@amd.com, santosh.shukla@amd.com,
pandoh@google.com, kumaranand@google.com
Subject: Re: [PATCH v7 04/10] iommu/amd: Introduce struct ivhd_dte_flags to store persistent DTE flags
Date: Thu, 31 Oct 2024 09:40:24 -0300 [thread overview]
Message-ID: <20241031124024.GE10193@nvidia.com> (raw)
In-Reply-To: <20241031091624.4895-5-suravee.suthikulpanit@amd.com>
On Thu, Oct 31, 2024 at 09:16:18AM +0000, Suravee Suthikulpanit wrote:
> During early initialization, the driver parses IVRS IVHD block to get list
> of downstream devices along with their DTE flags (i.e INITPass, EIntPass,
> NMIPass, SysMgt, Lint0Pass, Lint1Pass). This information is currently
> store in the device DTE, and needs to be preserved when clearing
> and configuring each DTE, which makes it difficult to manage.
>
> Introduce struct ivhd_dte_flags to store IVHD DTE settings for a device or
> range of devices, which are stored in the amd_ivhd_dev_flags_list during
> initial IVHD parsing.
>
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> ---
> drivers/iommu/amd/amd_iommu_types.h | 15 ++++
> drivers/iommu/amd/init.c | 110 ++++++++++++++++++++--------
> 2 files changed, 96 insertions(+), 29 deletions(-)
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
> /* sets a specific bit in the device table entry. */
> +static void set_dte_bit(struct dev_table_entry *dte, u8 bit)
> +{
> + int i = (bit >> 6) & 0x03;
> + int _bit = bit & 0x3f;
> +
> + dte->data[i] |= (1UL << _bit);
> +}
It would be nice to see the remaining DEV_ENTRY constants harmonized
with the DTE_ constants so there aren't two schemes for working with
the struct dev_table_entry, but that is an idea for some other series
Jason
next prev parent reply other threads:[~2024-10-31 12:40 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-31 9:16 [PATCH v7 00/10] iommu/amd: Use 128-bit cmpxchg operation to update DTE Suravee Suthikulpanit
2024-10-31 9:16 ` [PATCH v7 01/10] iommu/amd: Misc ACPI IVRS debug info clean up Suravee Suthikulpanit
2024-10-31 9:16 ` [PATCH v7 02/10] iommu/amd: Disable AMD IOMMU if CMPXCHG16B feature is not supported Suravee Suthikulpanit
2024-10-31 9:16 ` [PATCH v7 03/10] asm/rwonce: Introduce [READ|WRITE]_ONCE() support for __int128 Suravee Suthikulpanit
2024-10-31 9:16 ` [PATCH v7 04/10] iommu/amd: Introduce struct ivhd_dte_flags to store persistent DTE flags Suravee Suthikulpanit
2024-10-31 12:40 ` Jason Gunthorpe [this message]
2024-10-31 9:16 ` [PATCH v7 05/10] iommu/amd: Introduce helper function to update 256-bit DTE Suravee Suthikulpanit
2024-10-31 9:16 ` [PATCH v7 06/10] iommu/amd: Modify set_dte_entry() to use 256-bit DTE helpers Suravee Suthikulpanit
2024-10-31 12:53 ` Jason Gunthorpe
2024-10-31 16:18 ` Suthikulpanit, Suravee
2024-10-31 9:16 ` [PATCH v7 07/10] iommu/amd: Introduce helper function get_dte256() Suravee Suthikulpanit
2024-10-31 9:16 ` [PATCH v7 08/10] iommu/amd: Modify clear_dte_entry() to avoid in-place update Suravee Suthikulpanit
2024-10-31 9:16 ` [PATCH v7 09/10] iommu/amd: Lock DTE before updating the entry with WRITE_ONCE() Suravee Suthikulpanit
2024-10-31 9:16 ` [PATCH v7 10/10] iommu/amd: Remove amd_iommu_apply_erratum_63() Suravee Suthikulpanit
2024-10-31 12:56 ` Jason Gunthorpe
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