* [PATCH RESEND 1/2] locking/atomic/x86: Use ALT_OUTPUT_SP() for __alternative_atomic64()
@ 2024-11-03 16:09 Uros Bizjak
2024-11-03 16:09 ` [PATCH RESEND 2/2] locking/atomic/x86: Use ALT_OUTPUT_SP() for __arch_{,try_}cmpxchg64_emu() Uros Bizjak
2024-11-06 10:47 ` [tip: locking/core] locking/atomic/x86: Use ALT_OUTPUT_SP() for __alternative_atomic64() tip-bot2 for Uros Bizjak
0 siblings, 2 replies; 4+ messages in thread
From: Uros Bizjak @ 2024-11-03 16:09 UTC (permalink / raw)
To: x86, linux-kernel
Cc: Uros Bizjak, Will Deacon, Peter Zijlstra, Boqun Feng,
Mark Rutland, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, H. Peter Anvin, Jan Beulich
CONFIG_X86_CMPXCHG64 variant of x86_32 __alternative_atomic64()
macro uses CALL instruction inside asm statement. Use
ALT_OUTPUT_SP() macro to add required dependence on %esp register.
Fixes: 819165fb34b9 ("x86: Adjust asm constraints in atomic64 wrappers")
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Cc: Will Deacon <will@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Jan Beulich <JBeulich@suse.com>
---
arch/x86/include/asm/atomic64_32.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/atomic64_32.h b/arch/x86/include/asm/atomic64_32.h
index 1f650b4dde50..6c6e9b9f98a4 100644
--- a/arch/x86/include/asm/atomic64_32.h
+++ b/arch/x86/include/asm/atomic64_32.h
@@ -51,7 +51,8 @@ static __always_inline s64 arch_atomic64_read_nonatomic(const atomic64_t *v)
#ifdef CONFIG_X86_CMPXCHG64
#define __alternative_atomic64(f, g, out, in...) \
asm volatile("call %c[func]" \
- : out : [func] "i" (atomic64_##g##_cx8), ## in)
+ : ALT_OUTPUT_SP(out) \
+ : [func] "i" (atomic64_##g##_cx8), ## in)
#define ATOMIC64_DECL(sym) ATOMIC64_DECL_ONE(sym##_cx8)
#else
--
2.42.0
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH RESEND 2/2] locking/atomic/x86: Use ALT_OUTPUT_SP() for __arch_{,try_}cmpxchg64_emu() 2024-11-03 16:09 [PATCH RESEND 1/2] locking/atomic/x86: Use ALT_OUTPUT_SP() for __alternative_atomic64() Uros Bizjak @ 2024-11-03 16:09 ` Uros Bizjak 2024-11-06 10:47 ` [tip: locking/core] " tip-bot2 for Uros Bizjak 2024-11-06 10:47 ` [tip: locking/core] locking/atomic/x86: Use ALT_OUTPUT_SP() for __alternative_atomic64() tip-bot2 for Uros Bizjak 1 sibling, 1 reply; 4+ messages in thread From: Uros Bizjak @ 2024-11-03 16:09 UTC (permalink / raw) To: x86, linux-kernel Cc: Uros Bizjak, Will Deacon, Peter Zijlstra, Boqun Feng, Mark Rutland, Thomas Gleixner, Ingo Molnar, Borislav Petkov, Dave Hansen, H. Peter Anvin, Jan Beulich x86_32 __arch_{,try_}cmpxchg64_emu()() macros use CALL instruction inside asm statement. Use ALT_OUTPUT_SP() macro to add required dependence on %esp register. Fixes: 79e1dd05d1a2 ("x86: Provide an alternative() based cmpxchg64()") Signed-off-by: Uros Bizjak <ubizjak@gmail.com> Cc: Will Deacon <will@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Boqun Feng <boqun.feng@gmail.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Jan Beulich <JBeulich@suse.com> --- arch/x86/include/asm/cmpxchg_32.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/cmpxchg_32.h b/arch/x86/include/asm/cmpxchg_32.h index 62cef2113ca7..fd1282a783dd 100644 --- a/arch/x86/include/asm/cmpxchg_32.h +++ b/arch/x86/include/asm/cmpxchg_32.h @@ -94,7 +94,7 @@ static __always_inline bool __try_cmpxchg64_local(volatile u64 *ptr, u64 *oldp, asm volatile(ALTERNATIVE(_lock_loc \ "call cmpxchg8b_emu", \ _lock "cmpxchg8b %a[ptr]", X86_FEATURE_CX8) \ - : "+a" (o.low), "+d" (o.high) \ + : ALT_OUTPUT_SP("+a" (o.low), "+d" (o.high)) \ : "b" (n.low), "c" (n.high), [ptr] "S" (_ptr) \ : "memory"); \ \ @@ -123,8 +123,8 @@ static __always_inline u64 arch_cmpxchg64_local(volatile u64 *ptr, u64 old, u64 "call cmpxchg8b_emu", \ _lock "cmpxchg8b %a[ptr]", X86_FEATURE_CX8) \ CC_SET(e) \ - : CC_OUT(e) (ret), \ - "+a" (o.low), "+d" (o.high) \ + : ALT_OUTPUT_SP(CC_OUT(e) (ret), \ + "+a" (o.low), "+d" (o.high)) \ : "b" (n.low), "c" (n.high), [ptr] "S" (_ptr) \ : "memory"); \ \ -- 2.42.0 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [tip: locking/core] locking/atomic/x86: Use ALT_OUTPUT_SP() for __arch_{,try_}cmpxchg64_emu() 2024-11-03 16:09 ` [PATCH RESEND 2/2] locking/atomic/x86: Use ALT_OUTPUT_SP() for __arch_{,try_}cmpxchg64_emu() Uros Bizjak @ 2024-11-06 10:47 ` tip-bot2 for Uros Bizjak 0 siblings, 0 replies; 4+ messages in thread From: tip-bot2 for Uros Bizjak @ 2024-11-06 10:47 UTC (permalink / raw) To: linux-tip-commits; +Cc: Uros Bizjak, Peter Zijlstra (Intel), x86, linux-kernel The following commit has been merged into the locking/core branch of tip: Commit-ID: 25cf4fbb596d730476afcc0fb87a9d708db14078 Gitweb: https://git.kernel.org/tip/25cf4fbb596d730476afcc0fb87a9d708db14078 Author: Uros Bizjak <ubizjak@gmail.com> AuthorDate: Sun, 03 Nov 2024 17:09:32 +01:00 Committer: Peter Zijlstra <peterz@infradead.org> CommitterDate: Tue, 05 Nov 2024 12:55:34 +01:00 locking/atomic/x86: Use ALT_OUTPUT_SP() for __arch_{,try_}cmpxchg64_emu() x86_32 __arch_{,try_}cmpxchg64_emu()() macros use CALL instruction inside asm statement. Use ALT_OUTPUT_SP() macro to add required dependence on %esp register. Fixes: 79e1dd05d1a2 ("x86: Provide an alternative() based cmpxchg64()") Signed-off-by: Uros Bizjak <ubizjak@gmail.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20241103160954.3329-2-ubizjak@gmail.com --- arch/x86/include/asm/cmpxchg_32.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/cmpxchg_32.h b/arch/x86/include/asm/cmpxchg_32.h index 62cef21..fd1282a 100644 --- a/arch/x86/include/asm/cmpxchg_32.h +++ b/arch/x86/include/asm/cmpxchg_32.h @@ -94,7 +94,7 @@ static __always_inline bool __try_cmpxchg64_local(volatile u64 *ptr, u64 *oldp, asm volatile(ALTERNATIVE(_lock_loc \ "call cmpxchg8b_emu", \ _lock "cmpxchg8b %a[ptr]", X86_FEATURE_CX8) \ - : "+a" (o.low), "+d" (o.high) \ + : ALT_OUTPUT_SP("+a" (o.low), "+d" (o.high)) \ : "b" (n.low), "c" (n.high), [ptr] "S" (_ptr) \ : "memory"); \ \ @@ -123,8 +123,8 @@ static __always_inline u64 arch_cmpxchg64_local(volatile u64 *ptr, u64 old, u64 "call cmpxchg8b_emu", \ _lock "cmpxchg8b %a[ptr]", X86_FEATURE_CX8) \ CC_SET(e) \ - : CC_OUT(e) (ret), \ - "+a" (o.low), "+d" (o.high) \ + : ALT_OUTPUT_SP(CC_OUT(e) (ret), \ + "+a" (o.low), "+d" (o.high)) \ : "b" (n.low), "c" (n.high), [ptr] "S" (_ptr) \ : "memory"); \ \ ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [tip: locking/core] locking/atomic/x86: Use ALT_OUTPUT_SP() for __alternative_atomic64() 2024-11-03 16:09 [PATCH RESEND 1/2] locking/atomic/x86: Use ALT_OUTPUT_SP() for __alternative_atomic64() Uros Bizjak 2024-11-03 16:09 ` [PATCH RESEND 2/2] locking/atomic/x86: Use ALT_OUTPUT_SP() for __arch_{,try_}cmpxchg64_emu() Uros Bizjak @ 2024-11-06 10:47 ` tip-bot2 for Uros Bizjak 1 sibling, 0 replies; 4+ messages in thread From: tip-bot2 for Uros Bizjak @ 2024-11-06 10:47 UTC (permalink / raw) To: linux-tip-commits; +Cc: Uros Bizjak, Peter Zijlstra (Intel), x86, linux-kernel The following commit has been merged into the locking/core branch of tip: Commit-ID: 8b64db9733c2e4d30fd068d0b9dcef7b4424b035 Gitweb: https://git.kernel.org/tip/8b64db9733c2e4d30fd068d0b9dcef7b4424b035 Author: Uros Bizjak <ubizjak@gmail.com> AuthorDate: Sun, 03 Nov 2024 17:09:31 +01:00 Committer: Peter Zijlstra <peterz@infradead.org> CommitterDate: Tue, 05 Nov 2024 12:55:34 +01:00 locking/atomic/x86: Use ALT_OUTPUT_SP() for __alternative_atomic64() CONFIG_X86_CMPXCHG64 variant of x86_32 __alternative_atomic64() macro uses CALL instruction inside asm statement. Use ALT_OUTPUT_SP() macro to add required dependence on %esp register. Fixes: 819165fb34b9 ("x86: Adjust asm constraints in atomic64 wrappers") Signed-off-by: Uros Bizjak <ubizjak@gmail.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20241103160954.3329-1-ubizjak@gmail.com --- arch/x86/include/asm/atomic64_32.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/atomic64_32.h b/arch/x86/include/asm/atomic64_32.h index 1f650b4..6c6e9b9 100644 --- a/arch/x86/include/asm/atomic64_32.h +++ b/arch/x86/include/asm/atomic64_32.h @@ -51,7 +51,8 @@ static __always_inline s64 arch_atomic64_read_nonatomic(const atomic64_t *v) #ifdef CONFIG_X86_CMPXCHG64 #define __alternative_atomic64(f, g, out, in...) \ asm volatile("call %c[func]" \ - : out : [func] "i" (atomic64_##g##_cx8), ## in) + : ALT_OUTPUT_SP(out) \ + : [func] "i" (atomic64_##g##_cx8), ## in) #define ATOMIC64_DECL(sym) ATOMIC64_DECL_ONE(sym##_cx8) #else ^ permalink raw reply related [flat|nested] 4+ messages in thread
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