From: Bjorn Helgaas <helgaas@kernel.org>
To: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: Jian-Hong Pan <jhp@endlessos.org>,
Johan Hovold <johan@kernel.org>,
David Box <david.e.box@linux.intel.com>,
Kuppuswamy Sathyanarayanan
<sathyanarayanan.kuppuswamy@linux.intel.com>,
Nirmal Patel <nirmal.patel@linux.intel.com>,
Jonathan Derrick <jonathan.derrick@linux.dev>,
linux-pci@vger.kernel.org, LKML <linux-kernel@vger.kernel.org>,
linux@endlessos.org
Subject: Re: [PATCH v12 3/3] PCI/ASPM: Make pci_save_aspm_l1ss_state save both child and parent's L1SS configuration
Date: Wed, 6 Nov 2024 11:16:04 -0600 [thread overview]
Message-ID: <20241106171604.GA1529996@bhelgaas> (raw)
In-Reply-To: <04b86150-c6f5-2898-5b43-dcf14c19845e@linux.intel.com>
On Wed, Nov 06, 2024 at 12:54:12PM +0200, Ilpo Järvinen wrote:
> On Tue, 5 Nov 2024, Bjorn Helgaas wrote:
> > On Tue, Oct 01, 2024 at 04:34:42PM +0800, Jian-Hong Pan wrote:
> > > PCI devices' parameters on the VMD bus have been programmed properly
> > > originally. But, cleared after pci_reset_bus() and have not been restored
> > > correctly. This leads the link's L1.2 between PCIe Root Port and child
> > > device gets wrong configs.
> ...
> > > So, if the PCI device has a parent, make pci_save_aspm_l1ss_state() save
> > > the parent's L1SS configuration, too. This is symmetric on
> > > pci_restore_aspm_l1ss_state().
> > I see the suggestion for a helper here, but I'm not convinced.
> > pci_save_aspm_l1ss_state() and pci_restore_aspm_l1ss_state() should
> > *look* similar, and a helper makes them less similar.
> >
> > I think you should go to some effort to follow the
> > pci_restore_aspm_l1ss_state() structure, as much as possible doing the
> > same declarations, checks, and lookups in the same order, e.g.:
> >
> > struct pci_cap_saved_state *pl_save_state, *cl_save_state;
> > struct pci_dev *parent = pdev->bus->self;
> >
> > if (pcie_downstream_port(pdev) || !parent)
> > return;
> >
> > if (!pdev->l1ss || !parent->l1ss)
> > return;
> >
> > cl_save_state = pci_find_saved_ext_cap(pdev, PCI_EXT_CAP_ID_L1SS);
> > pl_save_state = pci_find_saved_ext_cap(parent, PCI_EXT_CAP_ID_L1SS);
> > if (!cl_save_state || !pl_save_state)
> > return;
>
> I understand I'm not the one who has the final say in this, but the reason
> why restore has to be done the way it is (the long way), is because of the
> strict ordering requirement of operations it performs.
>
> There are no similar ordering requirements on the save side AFAIK.
I'm not suggesting any change to the restore side. The commit log
says we're making save/restore symmetric, but IMO they end up looking
very asymmetric.
Bjorn
next prev parent reply other threads:[~2024-11-06 17:16 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-01 8:34 [PATCH v12 0/3] PCI: vmd: Enable PCI PM's L1 substates of remapped PCIe Root Port and NVMe Jian-Hong Pan
2024-10-01 8:34 ` [PATCH v12 1/3] PCI: vmd: Set PCI devices to D0 before enable PCI PM's L1 substates Jian-Hong Pan
2024-11-03 20:40 ` Krzysztof Wilczyński
2024-10-01 8:34 ` [PATCH v12 2/3] PCI/ASPM: Add notes about enabling PCI-PM L1SS to pci_enable_link_state(_locked) Jian-Hong Pan
2024-10-01 8:34 ` [PATCH v12 3/3] PCI/ASPM: Make pci_save_aspm_l1ss_state save both child and parent's L1SS configuration Jian-Hong Pan
2024-10-01 15:00 ` Ilpo Järvinen
2024-10-02 0:02 ` David E. Box
2024-10-02 8:02 ` Ilpo Järvinen
2024-11-03 20:47 ` Krzysztof Wilczyński
2024-11-05 22:59 ` Bjorn Helgaas
2024-11-06 10:54 ` Ilpo Järvinen
2024-11-06 17:16 ` Bjorn Helgaas [this message]
2024-11-07 9:19 ` Jian-Hong Pan
2024-11-07 15:41 ` Bjorn Helgaas
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