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From: <shiju.jose@huawei.com>
To: <linux-edac@vger.kernel.org>, <linux-cxl@vger.kernel.org>,
	<mchehab@kernel.org>, <dave.jiang@intel.com>,
	<dan.j.williams@intel.com>, <jonathan.cameron@huawei.com>,
	<alison.schofield@intel.com>, <nifan.cxl@gmail.com>,
	<vishal.l.verma@intel.com>, <ira.weiny@intel.com>,
	<dave@stgolabs.net>
Cc: <linux-kernel@vger.kernel.org>, <linuxarm@huawei.com>,
	<tanxiaofei@huawei.com>, <prime.zeng@hisilicon.com>,
	<shiju.jose@huawei.com>
Subject: [PATCH 01/13] rasdaemon: cxl: Fix logging of memory event type of DRAM trace event
Date: Wed, 20 Nov 2024 09:59:11 +0000	[thread overview]
Message-ID: <20241120095923.1891-2-shiju.jose@huawei.com> (raw)
In-Reply-To: <20241120095923.1891-1-shiju.jose@huawei.com>

From: Shiju Jose <shiju.jose@huawei.com>

CXL spec rev 3.0 section 8.2.9.2.1.2 defines the DRAM Event Record.

Fix logging of memory event type field of DRAM trace event.
For e.g. if value is 0x1 it will be reported as an Invalid Address
(General Media Event Record - Memory Event Type) instead of Scrub Media
ECC Error (DRAM Event Record - Memory Event Type) and so on.

Fixes: 9a2f6186db26 ("rasdaemon: Add support for the CXL dram events")
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
---
 ras-cxl-handler.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/ras-cxl-handler.c b/ras-cxl-handler.c
index 67ce32e..8733b2b 100644
--- a/ras-cxl-handler.c
+++ b/ras-cxl-handler.c
@@ -898,6 +898,13 @@ int ras_cxl_general_media_event_handler(struct trace_seq *s,
 #define CXL_DER_VALID_COLUMN			BIT(6)
 #define CXL_DER_VALID_CORRECTION_MASK		BIT(7)
 
+static const char * const cxl_der_mem_event_type[] = {
+	"Media ECC Error",
+	"Scrub Media ECC Error",
+	"Invalid Address",
+	"Data Path Error",
+};
+
 int ras_cxl_dram_event_handler(struct trace_seq *s,
 			       struct tep_record *record,
 			       struct tep_event *event, void *context)
@@ -938,9 +945,9 @@ int ras_cxl_dram_event_handler(struct trace_seq *s,
 	if (tep_get_field_val(s,  event, "type", record, &val, 1) < 0)
 		return -1;
 	ev.type = val;
-	if (trace_seq_printf(s, "type:%s ",
-			     get_cxl_type_str(cxl_gmer_mem_event_type,
-					      ARRAY_SIZE(cxl_gmer_mem_event_type),
+	if (trace_seq_printf(s, "memory_event_type:%s ",
+			     get_cxl_type_str(cxl_der_mem_event_type,
+					      ARRAY_SIZE(cxl_der_mem_event_type),
 					      ev.type)) <= 0)
 		return -1;
 
-- 
2.43.0


  reply	other threads:[~2024-11-20 10:00 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-20  9:59 [PATCH 00/13] rasdaemon: cxl: Update CXL event logging and recording to CXL spec rev 3.1 shiju.jose
2024-11-20  9:59 ` shiju.jose [this message]
2024-11-21 15:11   ` [PATCH 01/13] rasdaemon: cxl: Fix logging of memory event type of DRAM trace event Jonathan Cameron
2024-11-20  9:59 ` [PATCH 02/13] rasdaemon: cxl: Fix mismatch in region field's name with kernel " shiju.jose
2024-11-21 15:12   ` Jonathan Cameron
2024-11-22 10:26     ` Shiju Jose
2024-11-20  9:59 ` [PATCH 03/13] rasdaemon: cxl: Add automatic indexing for storing CXL fields in SQLite database shiju.jose
2024-11-21 15:17   ` Jonathan Cameron
2024-11-22 10:31     ` Shiju Jose
2024-11-20  9:59 ` [PATCH 04/13] rasdaemon: cxl: Update common event to CXL spec rev 3.1 shiju.jose
2024-11-21 15:19   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 05/13] rasdaemon: cxl: Add Component Identifier formatting for " shiju.jose
2024-11-21 15:20   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 06/13] rasdaemon: cxl: Update CXL general media event to " shiju.jose
2024-11-21 15:27   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 07/13] rasdaemon: cxl: Update CXL DRAM " shiju.jose
2024-11-21 15:29   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 08/13] rasdaemon: cxl: Update memory module " shiju.jose
2024-11-21 15:32   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 09/13] rasdaemon: ras-mc-ctl: Fix logging of memory event type in CXL DRAM error table shiju.jose
2024-11-21 15:33   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 10/13] rasdaemon: ras-mc-ctl: Update logging of common event data to align with CXL spec rev 3.1 shiju.jose
2024-11-21 15:35   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 11/13] rasdaemon: ras-mc-ctl: Update logging of CXL general media " shiju.jose
2024-11-21 15:36   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 12/13] rasdaemon: ras-mc-ctl: Update logging of CXL DRAM " shiju.jose
2024-11-21 15:37   ` Jonathan Cameron
2024-11-20  9:59 ` [PATCH 13/13] rasdaemon: ras-mc-ctl: Update logging of CXL memory module " shiju.jose
2024-11-21 15:38   ` Jonathan Cameron
2024-11-22 10:41     ` Shiju Jose

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