From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F41161CEAD6; Sun, 24 Nov 2024 13:41:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732455713; cv=none; b=Jc6JYT3uXJbgu+05fvAuEH4jI2OxVkWDs5j1+pEA4xbiTyKNPYxXMOVwQQVa7/X4z1LSysuiQaDNUuShPvWRsByOUUkcVX9ToU9ulWXKQ8dysHW3j/NdoO3luj8pU7dF1JvMh4L9XOZM/TSkL6wrmyR9+FR7IOLLLvPWzDyaHec= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732455713; c=relaxed/simple; bh=oIyQxwGdwqUC/hQTDeVTkBG8rrVwIeGSvXaC+IUhS30=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Ynr13hjrSYW0MwCK/4AnKYRkWRCmzJt7XXYSkCtixxaWBL5GZhzFIlsWvwxu1i97BXgauWiz52kf5c9netdc8JvSSthCEzq5F0sC6tFBy5DVXym2G9eXCqXQMuc4OUyPM1M27sc2Vh8FUtB36/J4NP2nypqOPM/KNvyuJdkJxBs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZUA4eoFu; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZUA4eoFu" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 78A14C4CED1; Sun, 24 Nov 2024 13:41:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1732455712; bh=oIyQxwGdwqUC/hQTDeVTkBG8rrVwIeGSvXaC+IUhS30=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZUA4eoFuHhScm2heAW2ALSE8l9JqlQfQE+FDu9cZFn20TybfrbV6AV4MkTdqz26wK 3WwjLS8FBqhcRR+D2c8IITzzdkEW3dshR254tEabzGnCRCoVl8RRYxX18Uk38JCIdu n8+SpPE4Y1oY90+AZOirXEos0xoGk+rYv+hC14lZwK6jyCAlBOu9UDlDmGqejZOxu5 FF6yBxVSfaMDEL9gsaWY9cQ+K2MOA9dTS1fHmOVE9XOA1GfHLpPYnrnhOf7fbrNA5a Y8qmxufnLpPD/X+I80V4r5bsHNcijevLRNqV92Jd8DilWHkSZFwsrCtoNl5BZhml1f PRfnPSTXcyjyw== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Alex Deucher , Harry Wentland , Sasha Levin , sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, simona@ffwll.ch, hamza.mahfooz@amd.com, alex.hung@amd.com, chiahsuan.chung@amd.com, sunil.khatri@amd.com, aurabindo.pillai@amd.com, mwen@igalia.com, Wayne.Lin@amd.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 6.11 20/87] drm/amd/display: disable SG displays on cyan skillfish Date: Sun, 24 Nov 2024 08:37:58 -0500 Message-ID: <20241124134102.3344326-20-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241124134102.3344326-1-sashal@kernel.org> References: <20241124134102.3344326-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 6.11.10 Content-Transfer-Encoding: 8bit From: Alex Deucher [ Upstream commit 66369db7fdd7d58d78673bf83d2b87ea623efb63 ] These parts were mainly for compute workloads, but they have a display that was available for the console. These chips should support SG display, but I don't know that the support was ever validated on Linux so disable it by default. It can still be enabled by setting sg_display=1 for those that want to play with it. These systems also generally had large carve outs so SG display was less of a factor. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3356 Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 339bdfb7af2f8..90df415ece0bf 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -1871,7 +1871,11 @@ static int amdgpu_dm_init(struct amdgpu_device *adev) else init_data.flags.gpu_vm_support = (amdgpu_sg_display != 0); } else { - init_data.flags.gpu_vm_support = (amdgpu_sg_display != 0) && (adev->flags & AMD_IS_APU); + if (amdgpu_ip_version(adev, DCE_HWIP, 0) == IP_VERSION(2, 0, 3)) + init_data.flags.gpu_vm_support = (amdgpu_sg_display == 1); + else + init_data.flags.gpu_vm_support = + (amdgpu_sg_display != 0) && (adev->flags & AMD_IS_APU); } adev->mode_info.gpu_vm_support = init_data.flags.gpu_vm_support; -- 2.43.0